Samsung soc drivers changes for v5.4
Add Exynos Chipid driver for identification of product IDs and SoC revisions. The driver also exposes chipid regmap, later to be used by Exynos Adaptive Supply Voltage driver (adjusting voltages to different revisions of same SoC). -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl1W2AMQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1/FxEACSrzTmqvbMgmL8NpKa73ALWH4LZdhxUFKS POgSxXAIIawxJRMGehReKD92rWoAbak/2AEPP35z1IJ80GUrjP88uy/kT0bXb6ZO m4h1XLModAW6jiXnRkzm9KnGrOuz4ZcFe+VbAO1AwGZobtMLqCUmGPphyNMC1tAY Et0/dsnFK8g2GEEIJKfmyfQzW5BnCJCTOoIqftH9LK/m4YvaooxJjTK9T0/n5up3 k8xKazudRzi6J9DaYEfBlvmrD/GscBKpUBp39CSvGab9kpx+G4a+4jvUGutKNgdj iY6OoATHK+siFaqu/5PjBmlc6z+OY0yManXkZLDIejs4g5RZqtg0v4Mx7GeQVWX+ xx5z1UbNqsIEbFCmF5ptTDehfN1WMk7DMdcI/xvzGU7/bOc8YEv0ERb2dTH1PAGr 8YJFQaVgBN0+BFaz5al9EKKtFsqAA3KdKpMWTWfqtF0dJWJkmyECQTuMDjKVurqT z3FFLZXSmcxT+BceszXdghyKBG0pCMZ9E8dX8gMbcwNPcujQyoCbcnnugLs/Lekd CiNqYHx31T9l4V9mu6rKqm+kaIwaXCg7T6ydbVo6ysFUeC0tlfhSRWAxzUv+V04s 6+13hMHvg269r1oUsKsJCvIBSnOvtgO4AxX0c2Z2oVQFP4PcD6w8/CGK4jw2Y+c4 DkgKuYVJFQ== =7pIf -----END PGP SIGNATURE----- Merge tag 'samsung-drivers-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers Samsung soc drivers changes for v5.4 Add Exynos Chipid driver for identification of product IDs and SoC revisions. The driver also exposes chipid regmap, later to be used by Exynos Adaptive Supply Voltage driver (adjusting voltages to different revisions of same SoC). * tag 'samsung-drivers-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: soc: samsung: chipid: Convert exynos-chipid driver to use the regmap API soc: samsung: Add exynos chipid driver support Link: https://lore.kernel.org/r/20190816163042.6604-1-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
30a344004c
@ -7,6 +7,11 @@ menuconfig SOC_SAMSUNG
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if SOC_SAMSUNG
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config EXYNOS_CHIPID
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bool "Exynos Chipid controller driver" if COMPILE_TEST
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depends on ARCH_EXYNOS || COMPILE_TEST
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select SOC_BUS
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config EXYNOS_PMU
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bool "Exynos PMU controller driver" if COMPILE_TEST
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depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
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@ -1,4 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_EXYNOS_CHIPID) += exynos-chipid.o
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obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o
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obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS) += exynos3250-pmu.o exynos4-pmu.o \
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101
drivers/soc/samsung/exynos-chipid.c
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101
drivers/soc/samsung/exynos-chipid.c
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@ -0,0 +1,101 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* EXYNOS - CHIP ID support
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* Author: Pankaj Dubey <pankaj.dubey@samsung.com>
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* Author: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
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*/
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/soc/samsung/exynos-chipid.h>
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#include <linux/sys_soc.h>
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static const struct exynos_soc_id {
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const char *name;
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unsigned int id;
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} soc_ids[] = {
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{ "EXYNOS3250", 0xE3472000 },
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{ "EXYNOS4210", 0x43200000 }, /* EVT0 revision */
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{ "EXYNOS4210", 0x43210000 },
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{ "EXYNOS4212", 0x43220000 },
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{ "EXYNOS4412", 0xE4412000 },
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{ "EXYNOS5250", 0x43520000 },
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{ "EXYNOS5260", 0xE5260000 },
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{ "EXYNOS5410", 0xE5410000 },
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{ "EXYNOS5420", 0xE5420000 },
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{ "EXYNOS5440", 0xE5440000 },
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{ "EXYNOS5800", 0xE5422000 },
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{ "EXYNOS7420", 0xE7420000 },
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{ "EXYNOS5433", 0xE5433000 },
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};
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static const char * __init product_id_to_soc_id(unsigned int product_id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(soc_ids); i++)
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if ((product_id & EXYNOS_MASK) == soc_ids[i].id)
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return soc_ids[i].name;
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return NULL;
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}
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int __init exynos_chipid_early_init(void)
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{
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struct soc_device_attribute *soc_dev_attr;
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struct soc_device *soc_dev;
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struct device_node *root;
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struct regmap *regmap;
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u32 product_id;
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u32 revision;
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int ret;
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regmap = syscon_regmap_lookup_by_compatible("samsung,exynos4210-chipid");
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if (IS_ERR(regmap)) {
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pr_err("Failed to get CHIPID regmap\n");
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return PTR_ERR(regmap);
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}
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ret = regmap_read(regmap, EXYNOS_CHIPID_REG_PRO_ID, &product_id);
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if (ret < 0)
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return ret;
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revision = product_id & EXYNOS_REV_MASK;
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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return -ENOMEM;
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soc_dev_attr->family = "Samsung Exynos";
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root = of_find_node_by_path("/");
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of_property_read_string(root, "model", &soc_dev_attr->machine);
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of_node_put(root);
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%x", revision);
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soc_dev_attr->soc_id = product_id_to_soc_id(product_id);
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if (!soc_dev_attr->soc_id) {
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pr_err("Unknown SoC\n");
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return -ENODEV;
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}
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/* please note that the actual registration will be deferred */
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->revision);
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kfree(soc_dev_attr);
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return PTR_ERR(soc_dev);
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}
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/* it is too early to use dev_info() here (soc_dev is NULL) */
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pr_info("soc soc0: Exynos: CPU[%s] PRO_ID[0x%x] REV[0x%x] Detected\n",
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soc_dev_attr->soc_id, product_id, revision);
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return 0;
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}
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early_initcall(exynos_chipid_early_init);
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52
include/linux/soc/samsung/exynos-chipid.h
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52
include/linux/soc/samsung/exynos-chipid.h
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@ -0,0 +1,52 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Exynos - CHIPID support
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*/
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#ifndef __LINUX_SOC_EXYNOS_CHIPID_H
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#define __LINUX_SOC_EXYNOS_CHIPID_H
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#define EXYNOS_CHIPID_REG_PRO_ID 0x00
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#define EXYNOS_SUBREV_MASK (0xf << 4)
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#define EXYNOS_MAINREV_MASK (0xf << 0)
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#define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | \
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EXYNOS_MAINREV_MASK)
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#define EXYNOS_MASK 0xfffff000
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#define EXYNOS_CHIPID_REG_PKG_ID 0x04
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/* Bit field definitions for EXYNOS_CHIPID_REG_PKG_ID register */
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#define EXYNOS5422_IDS_OFFSET 24
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#define EXYNOS5422_IDS_MASK 0xff
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#define EXYNOS5422_USESG_OFFSET 3
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#define EXYNOS5422_USESG_MASK 0x01
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#define EXYNOS5422_SG_OFFSET 0
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#define EXYNOS5422_SG_MASK 0x07
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#define EXYNOS5422_TABLE_OFFSET 8
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#define EXYNOS5422_TABLE_MASK 0x03
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#define EXYNOS5422_SG_A_OFFSET 17
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#define EXYNOS5422_SG_A_MASK 0x0f
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#define EXYNOS5422_SG_B_OFFSET 21
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#define EXYNOS5422_SG_B_MASK 0x03
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#define EXYNOS5422_SG_BSIGN_OFFSET 23
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#define EXYNOS5422_SG_BSIGN_MASK 0x01
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#define EXYNOS5422_BIN2_OFFSET 12
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#define EXYNOS5422_BIN2_MASK 0x01
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#define EXYNOS_CHIPID_REG_LOT_ID 0x14
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#define EXYNOS_CHIPID_REG_AUX_INFO 0x1c
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/* Bit field definitions for EXYNOS_CHIPID_REG_AUX_INFO register */
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#define EXYNOS5422_TMCB_OFFSET 0
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#define EXYNOS5422_TMCB_MASK 0x7f
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#define EXYNOS5422_ARM_UP_OFFSET 8
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#define EXYNOS5422_ARM_UP_MASK 0x03
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#define EXYNOS5422_ARM_DN_OFFSET 10
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#define EXYNOS5422_ARM_DN_MASK 0x03
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#define EXYNOS5422_KFC_UP_OFFSET 12
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#define EXYNOS5422_KFC_UP_MASK 0x03
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#define EXYNOS5422_KFC_DN_OFFSET 14
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#define EXYNOS5422_KFC_DN_MASK 0x03
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#endif /*__LINUX_SOC_EXYNOS_CHIPID_H */
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