[PATCH] ppc32: add 440GX erratum 440_43 workaround
This patch adds workaround for PPC 440GX erratum 440_43. According to this erratum spurious MachineChecks (caused by L1 cache parity) can happen during DataTLB miss processing. We disable L1 cache parity checking for 440GX rev.C and rev.F Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
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Paul Mackerras
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@ -29,6 +29,10 @@
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void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
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unsigned int ser_clk) __init;
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/* common 440GX platform init */
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void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7) __init;
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/* Enable L2 cache */
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void ibm440gx_l2c_enable(void) __init;
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