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[PATCH] ppc32: add 440GX erratum 440_43 workaround

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This patch adds workaround for PPC 440GX erratum 440_43. According to
this erratum spurious MachineChecks (caused by L1 cache parity) can
happen during DataTLB miss processing. We disable L1 cache parity
checking for 440GX rev.C and rev.F

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Eugene Surovegin
2006-04-25 01:22:44 -07:00
committed by Paul Mackerras
parent 1269277a5e
commit 30aacebed0
4 changed files with 18 additions and 2 deletions
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include/asm-ppc/reg_booke.h
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@@ -237,6 +237,7 @@ do { \
#endif
/* Bit definitions for CCR1. */
#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
#define CCR1_TCS 0x00000080 /* Timer Clock Select */
/* Bit definitions for the MCSR. */