e1000e: reorganize PHY and flow control interface
This reorganization moves the PHY status into a separate struct. Flow Control setup is moved into this struct as well and frame size away from here into the adapter struct where its inly use is. The post-link-up code is now a separate function and moved out of the watchdog function itself. This allows us to track the es2lan restart issue a bit easier. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
committed by
Jeff Garzik
parent
e2de3eb69c
commit
318a94d689
@@ -603,7 +603,6 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
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**/
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static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
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s32 ret_val;
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u16 nvm_data;
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@@ -624,12 +623,12 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
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}
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if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
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mac->fc = e1000_fc_none;
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hw->fc.type = e1000_fc_none;
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else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
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NVM_WORD0F_ASM_DIR)
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mac->fc = e1000_fc_tx_pause;
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hw->fc.type = e1000_fc_tx_pause;
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else
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mac->fc = e1000_fc_full;
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hw->fc.type = e1000_fc_full;
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return 0;
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}
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@@ -660,7 +659,7 @@ s32 e1000e_setup_link(struct e1000_hw *hw)
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* If flow control is set to default, set flow control based on
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* the EEPROM flow control settings.
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*/
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if (mac->fc == e1000_fc_default) {
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if (hw->fc.type == e1000_fc_default) {
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ret_val = e1000_set_default_fc_generic(hw);
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if (ret_val)
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return ret_val;
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@@ -671,9 +670,9 @@ s32 e1000e_setup_link(struct e1000_hw *hw)
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* in case we get disconnected and then reconnected into a different
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* hub or switch with different Flow Control capabilities.
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*/
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mac->original_fc = mac->fc;
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hw->fc.original_type = hw->fc.type;
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hw_dbg(hw, "After fix-ups FlowControl is now = %x\n", mac->fc);
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hw_dbg(hw, "After fix-ups FlowControl is now = %x\n", hw->fc.type);
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/* Call the necessary media_type subroutine to configure the link. */
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ret_val = mac->ops.setup_physical_interface(hw);
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@@ -691,7 +690,7 @@ s32 e1000e_setup_link(struct e1000_hw *hw)
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ew32(FCAH, FLOW_CONTROL_ADDRESS_HIGH);
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ew32(FCAL, FLOW_CONTROL_ADDRESS_LOW);
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ew32(FCTTV, mac->fc_pause_time);
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ew32(FCTTV, hw->fc.pause_time);
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return e1000e_set_fc_watermarks(hw);
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}
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@@ -725,7 +724,7 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
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* do not support receiving pause frames).
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* 3: Both Rx and Tx flow control (symmetric) are enabled.
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*/
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switch (mac->fc) {
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switch (hw->fc.type) {
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case e1000_fc_none:
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/* Flow control completely disabled by a software over-ride. */
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txcw = (E1000_TXCW_ANE | E1000_TXCW_FD);
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@@ -857,7 +856,7 @@ s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw)
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* detect a signal. If we have a signal, then poll for a "Link-Up"
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* indication.
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*/
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if (hw->media_type == e1000_media_type_internal_serdes ||
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if (hw->phy.media_type == e1000_media_type_internal_serdes ||
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(er32(CTRL) & E1000_CTRL_SWDPIN1)) {
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ret_val = e1000_poll_fiber_serdes_link_generic(hw);
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} else {
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@@ -898,7 +897,6 @@ void e1000e_config_collision_dist(struct e1000_hw *hw)
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**/
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s32 e1000e_set_fc_watermarks(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
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u32 fcrtl = 0, fcrth = 0;
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/*
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@@ -908,15 +906,15 @@ s32 e1000e_set_fc_watermarks(struct e1000_hw *hw)
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* ability to transmit pause frames is not enabled, then these
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* registers will be set to 0.
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*/
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if (mac->fc & e1000_fc_tx_pause) {
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if (hw->fc.type & e1000_fc_tx_pause) {
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/*
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* We need to set up the Receive Threshold high and low water
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* marks as well as (optionally) enabling the transmission of
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* XON frames.
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*/
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fcrtl = mac->fc_low_water;
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fcrtl = hw->fc.low_water;
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fcrtl |= E1000_FCRTL_XONE;
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fcrth = mac->fc_high_water;
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fcrth = hw->fc.high_water;
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}
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ew32(FCRTL, fcrtl);
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ew32(FCRTH, fcrth);
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@@ -936,7 +934,6 @@ s32 e1000e_set_fc_watermarks(struct e1000_hw *hw)
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**/
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s32 e1000e_force_mac_fc(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
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u32 ctrl;
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ctrl = er32(CTRL);
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@@ -948,7 +945,7 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw)
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* receive flow control.
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*
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* The "Case" statement below enables/disable flow control
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* according to the "mac->fc" parameter.
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* according to the "hw->fc.type" parameter.
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*
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* The possible values of the "fc" parameter are:
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* 0: Flow control is completely disabled
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@@ -959,9 +956,9 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw)
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* 3: Both Rx and Tx flow control (symmetric) is enabled.
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* other: No other values should be possible at this point.
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*/
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hw_dbg(hw, "mac->fc = %u\n", mac->fc);
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hw_dbg(hw, "hw->fc.type = %u\n", hw->fc.type);
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switch (mac->fc) {
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switch (hw->fc.type) {
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case e1000_fc_none:
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ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE));
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break;
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@@ -1009,11 +1006,11 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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* configuration of the MAC to match the "fc" parameter.
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*/
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if (mac->autoneg_failed) {
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if (hw->media_type == e1000_media_type_fiber ||
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hw->media_type == e1000_media_type_internal_serdes)
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if (hw->phy.media_type == e1000_media_type_fiber ||
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hw->phy.media_type == e1000_media_type_internal_serdes)
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ret_val = e1000e_force_mac_fc(hw);
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} else {
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if (hw->media_type == e1000_media_type_copper)
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if (hw->phy.media_type == e1000_media_type_copper)
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ret_val = e1000e_force_mac_fc(hw);
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}
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@@ -1028,7 +1025,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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* has completed, and if so, how the PHY and link partner has
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* flow control configured.
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*/
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if ((hw->media_type == e1000_media_type_copper) && mac->autoneg) {
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if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {
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/*
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* Read the MII Status Register and check to see if AutoNeg
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* has completed. We read this twice because this reg has
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@@ -1105,11 +1102,11 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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* ONLY. Hence, we must now check to see if we need to
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* turn OFF the TRANSMISSION of PAUSE frames.
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*/
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if (mac->original_fc == e1000_fc_full) {
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mac->fc = e1000_fc_full;
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if (hw->fc.original_type == e1000_fc_full) {
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hw->fc.type = e1000_fc_full;
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hw_dbg(hw, "Flow Control = FULL.\r\n");
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} else {
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mac->fc = e1000_fc_rx_pause;
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hw->fc.type = e1000_fc_rx_pause;
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hw_dbg(hw, "Flow Control = "
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"RX PAUSE frames only.\r\n");
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}
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@@ -1127,8 +1124,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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(mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
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mac->fc = e1000_fc_tx_pause;
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hw_dbg(hw, "Flow Control = TX PAUSE frames only.\r\n");
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hw->fc.type = e1000_fc_tx_pause;
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hw_dbg(hw, "Flow Control = Tx PAUSE frames only.\r\n");
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}
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/*
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* For transmitting PAUSE frames ONLY.
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@@ -1143,14 +1140,14 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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(mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
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!(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
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mac->fc = e1000_fc_rx_pause;
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hw_dbg(hw, "Flow Control = RX PAUSE frames only.\r\n");
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hw->fc.type = e1000_fc_rx_pause;
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hw_dbg(hw, "Flow Control = Rx PAUSE frames only.\r\n");
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} else {
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/*
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* Per the IEEE spec, at this point flow control
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* should be disabled.
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*/
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mac->fc = e1000_fc_none;
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hw->fc.type = e1000_fc_none;
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hw_dbg(hw, "Flow Control = NONE.\r\n");
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}
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@@ -1166,7 +1163,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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}
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if (duplex == HALF_DUPLEX)
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mac->fc = e1000_fc_none;
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hw->fc.type = e1000_fc_none;
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/*
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* Now we call a subroutine to actually force the MAC
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@@ -1436,7 +1433,7 @@ s32 e1000e_blink_led(struct e1000_hw *hw)
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u32 ledctl_blink = 0;
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u32 i;
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if (hw->media_type == e1000_media_type_fiber) {
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if (hw->phy.media_type == e1000_media_type_fiber) {
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/* always blink LED0 for PCI-E fiber */
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ledctl_blink = E1000_LEDCTL_LED0_BLINK |
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(E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
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@@ -1468,7 +1465,7 @@ s32 e1000e_led_on_generic(struct e1000_hw *hw)
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{
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u32 ctrl;
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switch (hw->media_type) {
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switch (hw->phy.media_type) {
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case e1000_media_type_fiber:
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ctrl = er32(CTRL);
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ctrl &= ~E1000_CTRL_SWDPIN0;
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@@ -1495,7 +1492,7 @@ s32 e1000e_led_off_generic(struct e1000_hw *hw)
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{
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u32 ctrl;
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switch (hw->media_type) {
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switch (hw->phy.media_type) {
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case e1000_media_type_fiber:
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ctrl = er32(CTRL);
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ctrl |= E1000_CTRL_SWDPIN0;
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