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perf, x86: Pass enable bit mask to __x86_pmu_enable_event()

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To reuse this function for events with different enable bit masks,
this mask is part of the function's argument list now.

The function will be used later to control ibs events too.

Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1271190201-25705-6-git-send-email-robert.richter@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Robert Richter
2010-04-13 22:23:14 +02:00
committed by Ingo Molnar
parent 9d0fcba67e
commit 31fa58af57
2 changed files with 8 additions and 6 deletions
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5
arch/x86/kernel/cpu/perf_event_intel.c
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@ -513,7 +513,8 @@ static void intel_pmu_nhm_enable_all(int added)
if (!event)
continue;
__x86_pmu_enable_event(&event->hw);
__x86_pmu_enable_event(&event->hw,
ARCH_PERFMON_EVENTSEL_ENABLE);
}
}
intel_pmu_enable_all(added);
@ -617,7 +618,7 @@ static void intel_pmu_enable_event(struct perf_event *event)
if (unlikely(event->attr.precise))
intel_pmu_pebs_enable(event);
__x86_pmu_enable_event(hwc);
__x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE);
}
/*