[SCSI] lpfc 8.2.8 : Update driver for new SLI-3 features
Update driver for new SLI-3 features: - interrupt enhancements - lose adapter doorbell writes - inlining support for FCP_Ixx cmds Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
This commit is contained in:
committed by
James Bottomley
parent
90160e010b
commit
34b02dcdcf
@@ -671,7 +671,7 @@ lpfc_config_pcb_setup(struct lpfc_hba * phba)
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{
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struct lpfc_sli *psli = &phba->sli;
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struct lpfc_sli_ring *pring;
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PCB_t *pcbp = &phba->slim2p->pcb;
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PCB_t *pcbp = phba->pcb;
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dma_addr_t pdma_addr;
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uint32_t offset;
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uint32_t iocbCnt = 0;
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@@ -700,23 +700,23 @@ lpfc_config_pcb_setup(struct lpfc_hba * phba)
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continue;
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}
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/* Command ring setup for ring */
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pring->cmdringaddr = (void *) &phba->slim2p->IOCBs[iocbCnt];
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pring->cmdringaddr = (void *)&phba->IOCBs[iocbCnt];
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pcbp->rdsc[i].cmdEntries = pring->numCiocb;
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offset = (uint8_t *) &phba->slim2p->IOCBs[iocbCnt] -
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(uint8_t *) phba->slim2p;
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pdma_addr = phba->slim2p_mapping + offset;
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offset = (uint8_t *) &phba->IOCBs[iocbCnt] -
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(uint8_t *) phba->slim2p.virt;
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pdma_addr = phba->slim2p.phys + offset;
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pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
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pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
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iocbCnt += pring->numCiocb;
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/* Response ring setup for ring */
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pring->rspringaddr = (void *) &phba->slim2p->IOCBs[iocbCnt];
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pring->rspringaddr = (void *) &phba->IOCBs[iocbCnt];
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pcbp->rdsc[i].rspEntries = pring->numRiocb;
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offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
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(uint8_t *)phba->slim2p;
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pdma_addr = phba->slim2p_mapping + offset;
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offset = (uint8_t *)&phba->IOCBs[iocbCnt] -
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(uint8_t *)phba->slim2p.virt;
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pdma_addr = phba->slim2p.phys + offset;
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pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
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pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
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iocbCnt += pring->numRiocb;
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@@ -977,8 +977,8 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
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offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
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pdma_addr = phba->slim2p_mapping + offset;
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offset = (uint8_t *)phba->pcb - (uint8_t *)phba->slim2p.virt;
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pdma_addr = phba->slim2p.phys + offset;
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mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
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mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
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@@ -986,12 +986,13 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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if (phba->sli_rev == 3 && phba->vpd.sli3Feat.cerbm) {
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mb->un.varCfgPort.cerbm = 1; /* Request HBQs */
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mb->un.varCfgPort.ccrp = 1; /* Command Ring Polling */
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mb->un.varCfgPort.cinb = 1; /* Interrupt Notification Block */
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mb->un.varCfgPort.max_hbq = lpfc_sli_hbq_count();
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if (phba->max_vpi && phba->cfg_enable_npiv &&
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phba->vpd.sli3Feat.cmv) {
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mb->un.varCfgPort.max_vpi = phba->max_vpi;
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mb->un.varCfgPort.cmv = 1;
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phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED;
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} else
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mb->un.varCfgPort.max_vpi = phba->max_vpi = 0;
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} else
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@@ -999,16 +1000,15 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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mb->un.varCfgPort.sli_mode = phba->sli_rev;
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/* Now setup pcb */
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phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
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phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
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phba->pcb->type = TYPE_NATIVE_SLI2;
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phba->pcb->feature = FEATURE_INITIAL_SLI2;
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/* Setup Mailbox pointers */
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phba->slim2p->pcb.mailBoxSize = offsetof(MAILBOX_t, us) +
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sizeof(struct sli2_desc);
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offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
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pdma_addr = phba->slim2p_mapping + offset;
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phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
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phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
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phba->pcb->mailBoxSize = sizeof(MAILBOX_t);
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offset = (uint8_t *)phba->mbox - (uint8_t *)phba->slim2p.virt;
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pdma_addr = phba->slim2p.phys + offset;
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phba->pcb->mbAddrHigh = putPaddrHigh(pdma_addr);
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phba->pcb->mbAddrLow = putPaddrLow(pdma_addr);
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/*
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* Setup Host Group ring pointer.
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@@ -1069,13 +1069,13 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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}
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/* mask off BAR0's flag bits 0 - 3 */
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phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
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(void __iomem *) phba->host_gp -
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phba->pcb->hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
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(void __iomem *)phba->host_gp -
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(void __iomem *)phba->MBslimaddr;
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if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
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phba->slim2p->pcb.hgpAddrHigh = bar_high;
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phba->pcb->hgpAddrHigh = bar_high;
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else
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phba->slim2p->pcb.hgpAddrHigh = 0;
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phba->pcb->hgpAddrHigh = 0;
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/* write HGP data to SLIM at the required longword offset */
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memset(&hgp, 0, sizeof(struct lpfc_hgp));
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@@ -1085,17 +1085,19 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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}
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/* Setup Port Group ring pointer */
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if (phba->sli_rev == 3)
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pgp_offset = (uint8_t *)&phba->slim2p->mbx.us.s3_pgp.port -
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(uint8_t *)phba->slim2p;
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else
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pgp_offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
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(uint8_t *)phba->slim2p;
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pdma_addr = phba->slim2p_mapping + pgp_offset;
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phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
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phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
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phba->hbq_get = &phba->slim2p->mbx.us.s3_pgp.hbq_get[0];
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if (phba->sli3_options & LPFC_SLI3_INB_ENABLED) {
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pgp_offset = offsetof(struct lpfc_sli2_slim,
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mbx.us.s3_inb_pgp.port);
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phba->hbq_get = phba->mbox->us.s3_inb_pgp.hbq_get;
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} else if (phba->sli_rev == 3) {
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pgp_offset = offsetof(struct lpfc_sli2_slim,
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mbx.us.s3_pgp.port);
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phba->hbq_get = phba->mbox->us.s3_pgp.hbq_get;
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} else
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pgp_offset = offsetof(struct lpfc_sli2_slim, mbx.us.s2.port);
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pdma_addr = phba->slim2p.phys + pgp_offset;
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phba->pcb->pgpAddrHigh = putPaddrHigh(pdma_addr);
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phba->pcb->pgpAddrLow = putPaddrLow(pdma_addr);
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/* Use callback routine to setp rings in the pcb */
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lpfc_config_pcb_setup(phba);
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@@ -1110,8 +1112,7 @@ lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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}
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/* Swap PCB if needed */
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lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
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sizeof(PCB_t));
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lpfc_sli_pcimem_bcopy(phba->pcb, phba->pcb, sizeof(PCB_t));
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}
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/**
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