V4L/DVB (3214): Calculate the saa7115 AMCLK regs instead of using fixed values
- Calculate the audio master clock registers from the actual frequencies. This simplifies the code and it also prepares for adding CGC2 support. - VIDIOC_INT_AUDIO_CLOCK_FREQ now receives an u32 instead of an enum. It is more generic and actually easier to implement. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@brturbo.com.br>
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committed by
Mauro Carvalho Chehab
parent
21fa715e67
commit
3578d3dd0b
@@ -26,13 +26,6 @@
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#ifndef V4L2_COMMON_H_
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#define V4L2_COMMON_H_
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/* VIDIOC_INT_AUDIO_CLOCK_FREQ */
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enum v4l2_audio_clock_freq {
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V4L2_AUDCLK_32_KHZ = 32000,
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V4L2_AUDCLK_441_KHZ = 44100,
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V4L2_AUDCLK_48_KHZ = 48000,
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};
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/* VIDIOC_INT_G_REGISTER and VIDIOC_INT_S_REGISTER */
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struct v4l2_register {
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u32 i2c_id; /* I2C driver ID of the I2C chip. 0 for the I2C adapter. */
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@@ -77,10 +70,12 @@ enum v4l2_chip_ident {
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/* Reset the I2C chip */
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#define VIDIOC_INT_RESET _IO ('d', 102)
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/* Set the frequency of the audio clock output.
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/* Set the frequency (in Hz) of the audio clock output.
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Used to slave an audio processor to the video decoder, ensuring that audio
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and video remain synchronized. */
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#define VIDIOC_INT_AUDIO_CLOCK_FREQ _IOR ('d', 103, enum v4l2_audio_clock_freq)
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and video remain synchronized.
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Usual values for the frequency are 48000, 44100 or 32000 Hz.
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If the frequency is not supported, then -EINVAL is returned. */
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#define VIDIOC_INT_AUDIO_CLOCK_FREQ _IOW ('d', 103, u32)
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/* Video decoders that support sliced VBI need to implement this ioctl.
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Field p of the v4l2_sliced_vbi_line struct is set to the start of the VBI
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