x86: use bus conf in NB conf fun1 to get bus range on, on 64-bit
... so we use the same code with Quad core cpu as old opteron. This patch is useful when acpi=off or _PXM is not there in DSDT. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@@ -12,15 +12,18 @@
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* RED-PEN empty cpus get reported wrong
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* RED-PEN empty cpus get reported wrong
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*/
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*/
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#define NODE_ID_REGISTER 0x60
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#define NODE_ID(dword) ((dword>>4) & 0x07)
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#define NODE_ID(dword) (dword & 0x07)
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#define LDT_BUS_NUMBER_REGISTER_0 0xE0
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#define LDT_BUS_NUMBER_REGISTER_0 0x94
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#define LDT_BUS_NUMBER_REGISTER_1 0xE4
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#define LDT_BUS_NUMBER_REGISTER_1 0xB4
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#define LDT_BUS_NUMBER_REGISTER_2 0xE8
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#define LDT_BUS_NUMBER_REGISTER_2 0xD4
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#define LDT_BUS_NUMBER_REGISTER_3 0xEC
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#define NR_LDT_BUS_NUMBER_REGISTERS 3
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#define NR_LDT_BUS_NUMBER_REGISTERS 4
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#define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 8) & 0xFF)
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#define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF)
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#define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF)
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#define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 24) & 0xFF)
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#define PCI_DEVICE_ID_K8HTCONFIG 0x1100
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#define PCI_DEVICE_ID_K8HTCONFIG 0x1100
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#define PCI_DEVICE_ID_K8_10H_HTCONFIG 0x1200
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#define PCI_DEVICE_ID_K8_11H_HTCONFIG 0x1300
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#ifdef CONFIG_NUMA
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#ifdef CONFIG_NUMA
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@@ -67,12 +70,19 @@ early_fill_mp_bus_to_node(void)
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#ifdef CONFIG_NUMA
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#ifdef CONFIG_NUMA
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int i, j;
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int i, j;
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unsigned slot;
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unsigned slot;
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u32 ldtbus, nid;
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u32 ldtbus;
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u32 id;
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u32 id;
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static int lbnr[3] = {
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int node;
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u16 deviceid;
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u16 vendorid;
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int min_bus;
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int max_bus;
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static int lbnr[NR_LDT_BUS_NUMBER_REGISTERS] = {
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LDT_BUS_NUMBER_REGISTER_0,
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LDT_BUS_NUMBER_REGISTER_0,
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LDT_BUS_NUMBER_REGISTER_1,
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LDT_BUS_NUMBER_REGISTER_1,
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LDT_BUS_NUMBER_REGISTER_2
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LDT_BUS_NUMBER_REGISTER_2,
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LDT_BUS_NUMBER_REGISTER_3
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};
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};
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for (i = 0; i < BUS_NR; i++)
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for (i = 0; i < BUS_NR; i++)
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@@ -81,38 +91,36 @@ early_fill_mp_bus_to_node(void)
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if (!early_pci_allowed())
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if (!early_pci_allowed())
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return -1;
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return -1;
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for (slot = 0x18; slot < 0x20; slot++) {
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slot = 0x18;
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id = read_pci_config(0, slot, 0, PCI_VENDOR_ID);
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id = read_pci_config(0, slot, 0, PCI_VENDOR_ID);
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if (id != (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_K8HTCONFIG<<16)))
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break;
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nid = read_pci_config(0, slot, 0, NODE_ID_REGISTER);
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for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) {
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vendorid = id & 0xffff;
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ldtbus = read_pci_config(0, slot, 0, lbnr[i]);
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if (vendorid != PCI_VENDOR_ID_AMD)
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/*
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goto out;
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* if there are no busses hanging off of the current
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* ldt link then both the secondary and subordinate
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deviceid = (id>>16) & 0xffff;
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* bus number fields are set to 0.
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if ((deviceid != PCI_DEVICE_ID_K8HTCONFIG) &&
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*
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(deviceid != PCI_DEVICE_ID_K8_10H_HTCONFIG) &&
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* RED-PEN
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(deviceid != PCI_DEVICE_ID_K8_11H_HTCONFIG))
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* This is slightly broken because it assumes
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goto out;
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* HT node IDs == Linux node ids, which is not always
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* true. However it is probably mostly true.
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for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) {
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*/
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ldtbus = read_pci_config(0, slot, 1, lbnr[i]);
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if (!(SECONDARY_LDT_BUS_NUMBER(ldtbus) == 0
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&& SUBORDINATE_LDT_BUS_NUMBER(ldtbus) == 0)) {
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/* Check if that register is enabled for bus range */
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for (j = SECONDARY_LDT_BUS_NUMBER(ldtbus);
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if ((ldtbus & 7) != 3)
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j <= SUBORDINATE_LDT_BUS_NUMBER(ldtbus);
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continue;
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j++) {
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int node = NODE_ID(nid);
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min_bus = SECONDARY_LDT_BUS_NUMBER(ldtbus);
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mp_bus_to_node[j] = (unsigned char)node;
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max_bus = SUBORDINATE_LDT_BUS_NUMBER(ldtbus);
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}
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node = NODE_ID(ldtbus);
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}
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for (j = min_bus; j <= max_bus; j++)
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}
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mp_bus_to_node[j] = (unsigned char) node;
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}
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}
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out:
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for (i = 0; i < BUS_NR; i++) {
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for (i = 0; i < BUS_NR; i++) {
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int node = mp_bus_to_node[i];
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node = mp_bus_to_node[i];
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if (node >= 0)
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if (node >= 0)
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printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
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printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
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}
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}
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