lk/linux-kernel-test
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

can: add TI CAN (HECC) driver

Browse Source 
TI HECC (High End CAN Controller) module is found on many TI devices. It
has 32 hardware mailboxes with full implementation of CAN protocol 2.0B
with bus speeds up to 1Mbps. Specifications of the module are available
on TI web <http://www.ti.com>

Signed-off-by: Anant Gole <anantgole@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Anant Gole
2009-10-07 02:59:47 +00:00
committed by David S. Miller
parent 0cdc03698f
commit 3758bf25db
4 changed files with 1054 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
include/linux/can/platform/ti_hecc.h Normal file
View File

@@ -0,0 +1,40 @@
/*
* TI HECC (High End CAN Controller) driver platform header
*
* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed as is WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
/**
* struct hecc_platform_data - HECC Platform Data
*
* @scc_hecc_offset: mostly 0 - should really never change
* @scc_ram_offset: SCC RAM offset
* @hecc_ram_offset: HECC RAM offset
* @mbx_offset: Mailbox RAM offset
* @int_line: Interrupt line to use - 0 or 1
* @version: version for future use
*
* Platform data structure to get all platform specific settings.
* this structure also accounts the fact that the IP may have different
* RAM and mailbox offsets for different SOC's
*/
struct ti_hecc_platform_data {
u32 scc_hecc_offset;
u32 scc_ram_offset;
u32 hecc_ram_offset;
u32 mbx_offset;
u32 int_line;
u32 version;
};