Blackfin arch: to do some consolidation of common code and common name spaces
now all BLKFIN should be BFIN, should be no functional changes. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@@ -39,6 +39,7 @@
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#include <linux/cramfs_fs.h>
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#include <linux/romfs_fs.h>
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#include <asm/cplb.h>
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#include <asm/cacheflush.h>
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#include <asm/blackfin.h>
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#include <asm/cplbinit.h>
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@@ -66,21 +67,21 @@ char __initdata command_line[COMMAND_LINE_SIZE];
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void __init bf53x_cache_init(void)
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{
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#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
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#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
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generate_cpl_tables();
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#endif
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#ifdef CONFIG_BLKFIN_CACHE
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#ifdef CONFIG_BFIN_ICACHE
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bfin_icache_init();
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printk(KERN_INFO "Instruction Cache Enabled\n");
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#endif
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#ifdef CONFIG_BLKFIN_DCACHE
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#ifdef CONFIG_BFIN_DCACHE
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bfin_dcache_init();
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printk(KERN_INFO "Data Cache Enabled"
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# if defined CONFIG_BLKFIN_WB
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# if defined CONFIG_BFIN_WB
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" (write-back)"
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# elif defined CONFIG_BLKFIN_WT
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# elif defined CONFIG_BFIN_WT
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" (write-through)"
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# endif
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"\n");
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@@ -262,7 +263,7 @@ void __init setup_arch(char **cmdline_p)
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&& ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
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mtd_size =
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PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
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# if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263)
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# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
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/* Due to a Hardware Anomaly we need to limit the size of usable
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* instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
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* 05000263 - Hardware loop corrupted when taking an ICPLB exception
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@@ -291,7 +292,7 @@ void __init setup_arch(char **cmdline_p)
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_ebss = memory_mtd_start; /* define _ebss for compatible */
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#endif /* CONFIG_MTD_UCLINUX */
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#if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263)
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#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
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/* Due to a Hardware Anomaly we need to limit the size of usable
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* instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
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* 05000263 - Hardware loop corrupted when taking an ICPLB exception
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@@ -535,9 +536,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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seq_printf(m, "I-CACHE:\tOFF\n");
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if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
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seq_printf(m, "D-CACHE:\tON"
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#if defined CONFIG_BLKFIN_WB
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#if defined CONFIG_BFIN_WB
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" (write-back)"
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#elif defined CONFIG_BLKFIN_WT
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#elif defined CONFIG_BFIN_WT
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" (write-through)"
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#endif
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"\n");
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@@ -566,15 +567,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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}
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seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024);
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seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
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seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
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seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
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BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES);
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BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
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seq_printf(m,
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"D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
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dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS,
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BLKFIN_DLINES);
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#ifdef CONFIG_BLKFIN_CACHE_LOCK
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dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
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BFIN_DLINES);
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#ifdef CONFIG_BFIN_ICACHE_LOCK
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switch (read_iloc()) {
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case WAY0_L:
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seq_printf(m, "Way0 Locked-Down\n");
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