ctcm: rename READ/WRITE defines to avoid redefinitions
READ/WRITE seems to be a bit too generic for defines in a device driver. Just rename them to CTCM_READ/CTCM_WRITE to avoid warnings. Signed-off-by: Ursula Braun <ursula.braun@de.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
319cb083cc
commit
3c09e2647b
@@ -419,8 +419,8 @@ void ctc_mpc_establish_connectivity(int port_num,
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return;
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priv = dev->ml_priv;
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grp = priv->mpcg;
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rch = priv->channel[READ];
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wch = priv->channel[WRITE];
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rch = priv->channel[CTCM_READ];
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wch = priv->channel[CTCM_WRITE];
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CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_INFO,
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"%s(%s): state=%s",
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@@ -578,7 +578,7 @@ void ctc_mpc_flow_control(int port_num, int flowc)
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"%s: %s: flowc = %d",
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CTCM_FUNTAIL, dev->name, flowc);
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rch = priv->channel[READ];
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rch = priv->channel[CTCM_READ];
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mpcg_state = fsm_getstate(grp->fsm);
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switch (flowc) {
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@@ -622,7 +622,7 @@ static void mpc_rcvd_sweep_resp(struct mpcg_info *mpcginfo)
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struct net_device *dev = rch->netdev;
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struct ctcm_priv *priv = dev->ml_priv;
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struct mpc_group *grp = priv->mpcg;
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struct channel *ch = priv->channel[WRITE];
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struct channel *ch = priv->channel[CTCM_WRITE];
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CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, ch, ch->id);
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CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH);
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@@ -656,7 +656,7 @@ static void ctcmpc_send_sweep_resp(struct channel *rch)
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int rc = 0;
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struct th_sweep *header;
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struct sk_buff *sweep_skb;
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struct channel *ch = priv->channel[WRITE];
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struct channel *ch = priv->channel[CTCM_WRITE];
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CTCM_PR_DEBUG("%s: ch=0x%p id=%s\n", __func__, rch, rch->id);
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@@ -712,7 +712,7 @@ static void mpc_rcvd_sweep_req(struct mpcg_info *mpcginfo)
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struct net_device *dev = rch->netdev;
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struct ctcm_priv *priv = dev->ml_priv;
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struct mpc_group *grp = priv->mpcg;
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struct channel *ch = priv->channel[WRITE];
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struct channel *ch = priv->channel[CTCM_WRITE];
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if (do_debug)
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CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
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@@ -721,8 +721,8 @@ static void mpc_rcvd_sweep_req(struct mpcg_info *mpcginfo)
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if (grp->in_sweep == 0) {
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grp->in_sweep = 1;
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ctcm_test_and_set_busy(dev);
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grp->sweep_req_pend_num = grp->active_channels[READ];
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grp->sweep_rsp_pend_num = grp->active_channels[READ];
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grp->sweep_req_pend_num = grp->active_channels[CTCM_READ];
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grp->sweep_rsp_pend_num = grp->active_channels[CTCM_READ];
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}
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CTCM_D3_DUMP((char *)mpcginfo->sweep, TH_SWEEP_LENGTH);
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@@ -906,14 +906,14 @@ void mpc_group_ready(unsigned long adev)
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fsm_newstate(grp->fsm, MPCG_STATE_READY);
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/* Put up a read on the channel */
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ch = priv->channel[READ];
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ch = priv->channel[CTCM_READ];
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ch->pdu_seq = 0;
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CTCM_PR_DBGDATA("ctcmpc: %s() ToDCM_pdu_seq= %08x\n" ,
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__func__, ch->pdu_seq);
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ctcmpc_chx_rxidle(ch->fsm, CTC_EVENT_START, ch);
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/* Put the write channel in idle state */
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ch = priv->channel[WRITE];
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ch = priv->channel[CTCM_WRITE];
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if (ch->collect_len > 0) {
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spin_lock(&ch->collect_lock);
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ctcm_purge_skb_queue(&ch->collect_queue);
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@@ -960,7 +960,8 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
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"%s: %i / Grp:%s total_channels=%i, active_channels: "
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"read=%i, write=%i\n", __func__, action,
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fsm_getstate_str(grp->fsm), grp->num_channel_paths,
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grp->active_channels[READ], grp->active_channels[WRITE]);
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grp->active_channels[CTCM_READ],
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grp->active_channels[CTCM_WRITE]);
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if ((action == MPC_CHANNEL_ADD) && (ch->in_mpcgroup == 0)) {
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grp->num_channel_paths++;
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@@ -994,10 +995,11 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
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grp->xid_skb->data,
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grp->xid_skb->len);
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ch->xid->xid2_dlc_type = ((CHANNEL_DIRECTION(ch->flags) == READ)
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ch->xid->xid2_dlc_type =
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((CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
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? XID2_READ_SIDE : XID2_WRITE_SIDE);
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if (CHANNEL_DIRECTION(ch->flags) == WRITE)
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if (CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE)
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ch->xid->xid2_buf_len = 0x00;
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ch->xid_skb->data = ch->xid_skb_data;
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@@ -1006,8 +1008,8 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
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fsm_newstate(ch->fsm, CH_XID0_PENDING);
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if ((grp->active_channels[READ] > 0) &&
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(grp->active_channels[WRITE] > 0) &&
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if ((grp->active_channels[CTCM_READ] > 0) &&
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(grp->active_channels[CTCM_WRITE] > 0) &&
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(fsm_getstate(grp->fsm) < MPCG_STATE_XID2INITW)) {
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fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
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CTCM_DBF_TEXT_(MPC_SETUP, CTC_DBF_NOTICE,
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@@ -1027,10 +1029,10 @@ void mpc_channel_action(struct channel *ch, int direction, int action)
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if (grp->channels_terminating)
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goto done;
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if (((grp->active_channels[READ] == 0) &&
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(grp->active_channels[WRITE] > 0))
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|| ((grp->active_channels[WRITE] == 0) &&
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(grp->active_channels[READ] > 0)))
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if (((grp->active_channels[CTCM_READ] == 0) &&
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(grp->active_channels[CTCM_WRITE] > 0))
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|| ((grp->active_channels[CTCM_WRITE] == 0) &&
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(grp->active_channels[CTCM_READ] > 0)))
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fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
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}
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done:
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@@ -1038,7 +1040,8 @@ done:
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"exit %s: %i / Grp:%s total_channels=%i, active_channels: "
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"read=%i, write=%i\n", __func__, action,
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fsm_getstate_str(grp->fsm), grp->num_channel_paths,
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grp->active_channels[READ], grp->active_channels[WRITE]);
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grp->active_channels[CTCM_READ],
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grp->active_channels[CTCM_WRITE]);
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CTCM_PR_DEBUG("exit %s: ch=0x%p id=%s\n", __func__, ch, ch->id);
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}
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@@ -1392,8 +1395,8 @@ static void mpc_action_go_inop(fsm_instance *fi, int event, void *arg)
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(grp->port_persist == 0))
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fsm_deltimer(&priv->restart_timer);
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wch = priv->channel[WRITE];
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rch = priv->channel[READ];
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wch = priv->channel[CTCM_WRITE];
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rch = priv->channel[CTCM_READ];
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switch (grp->saved_state) {
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case MPCG_STATE_RESET:
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@@ -1480,8 +1483,8 @@ static void mpc_action_timeout(fsm_instance *fi, int event, void *arg)
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priv = dev->ml_priv;
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grp = priv->mpcg;
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wch = priv->channel[WRITE];
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rch = priv->channel[READ];
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wch = priv->channel[CTCM_WRITE];
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rch = priv->channel[CTCM_READ];
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switch (fsm_getstate(grp->fsm)) {
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case MPCG_STATE_XID2INITW:
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@@ -1586,7 +1589,7 @@ static int mpc_validate_xid(struct mpcg_info *mpcginfo)
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CTCM_D3_DUMP((char *)xid, XID2_LENGTH);
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/*the received direction should be the opposite of ours */
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if (((CHANNEL_DIRECTION(ch->flags) == READ) ? XID2_WRITE_SIDE :
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if (((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? XID2_WRITE_SIDE :
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XID2_READ_SIDE) != xid->xid2_dlc_type) {
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rc = 2;
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/* XID REJECTED: r/w channel pairing mismatch */
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@@ -1912,7 +1915,7 @@ static void mpc_action_doxid7(fsm_instance *fsm, int event, void *arg)
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if (grp == NULL)
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return;
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for (direction = READ; direction <= WRITE; direction++) {
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for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
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struct channel *ch = priv->channel[direction];
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struct xid2 *thisxid = ch->xid;
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ch->xid_skb->data = ch->xid_skb_data;
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@@ -2152,14 +2155,15 @@ static int mpc_send_qllc_discontact(struct net_device *dev)
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return -ENOMEM;
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}
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*((__u32 *)skb_push(skb, 4)) = priv->channel[READ]->pdu_seq;
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priv->channel[READ]->pdu_seq++;
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*((__u32 *)skb_push(skb, 4)) =
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priv->channel[CTCM_READ]->pdu_seq;
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priv->channel[CTCM_READ]->pdu_seq++;
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CTCM_PR_DBGDATA("ctcmpc: %s ToDCM_pdu_seq= %08x\n",
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__func__, priv->channel[READ]->pdu_seq);
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__func__, priv->channel[CTCM_READ]->pdu_seq);
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/* receipt of CC03 resets anticipated sequence number on
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receiving side */
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priv->channel[READ]->pdu_seq = 0x00;
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priv->channel[CTCM_READ]->pdu_seq = 0x00;
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skb_reset_mac_header(skb);
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skb->dev = dev;
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skb->protocol = htons(ETH_P_SNAP);
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