[MTD] [NAND] rename at91_nand -> atmel_nand: internal symbols
This is basically s/at91_nand/atmel_nand/g with some manual inspection. Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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David Woodhouse
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@@ -11,26 +11,26 @@
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#ifndef ATMEL_NAND_ECC_H
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#define ATMEL_NAND_ECC_H
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#define AT91_ECC_CR 0x00 /* Control register */
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#define AT91_ECC_RST (1 << 0) /* Reset parity */
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#define ATMEL_ECC_CR 0x00 /* Control register */
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#define ATMEL_ECC_RST (1 << 0) /* Reset parity */
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#define AT91_ECC_MR 0x04 /* Mode register */
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#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */
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#define AT91_ECC_PAGESIZE_528 (0)
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#define AT91_ECC_PAGESIZE_1056 (1)
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#define AT91_ECC_PAGESIZE_2112 (2)
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#define AT91_ECC_PAGESIZE_4224 (3)
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#define ATMEL_ECC_MR 0x04 /* Mode register */
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#define ATMEL_ECC_PAGESIZE (3 << 0) /* Page Size */
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#define ATMEL_ECC_PAGESIZE_528 (0)
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#define ATMEL_ECC_PAGESIZE_1056 (1)
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#define ATMEL_ECC_PAGESIZE_2112 (2)
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#define ATMEL_ECC_PAGESIZE_4224 (3)
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#define AT91_ECC_SR 0x08 /* Status register */
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#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */
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#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
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#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */
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#define ATMEL_ECC_SR 0x08 /* Status register */
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#define ATMEL_ECC_RECERR (1 << 0) /* Recoverable Error */
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#define ATMEL_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
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#define ATMEL_ECC_MULERR (1 << 2) /* Multiple Errors */
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#define AT91_ECC_PR 0x0c /* Parity register */
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#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */
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#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
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#define ATMEL_ECC_PR 0x0c /* Parity register */
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#define ATMEL_ECC_BITADDR (0xf << 0) /* Bit Error Address */
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#define ATMEL_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
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#define AT91_ECC_NPR 0x10 /* NParity register */
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#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */
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#define ATMEL_ECC_NPR 0x10 /* NParity register */
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#define ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */
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#endif
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