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agp/intel: Fix resume regression from 2d2430cf

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On i915 [EeePCs] something scribles over the registers during suspend
and resume so we must save a copy of the PGETBL_CTL register programmed
by the BIOS and restore that upon resume.

Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
2010-09-14 20:15:22 +01:00
parent b1c5b0f8cc
commit 3f08e4ef80
1 changed files with 10 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/char/agp/intel-gtt.c
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@@ -98,6 +98,7 @@ static struct _intel_private {
u8 __iomem *registers; u8 __iomem *registers;
phys_addr_t gtt_bus_addr; phys_addr_t gtt_bus_addr;
phys_addr_t gma_bus_addr; phys_addr_t gma_bus_addr;
phys_addr_t pte_bus_addr;
u32 __iomem *gtt; /* I915G */ u32 __iomem *gtt; /* I915G */
int num_dcache_entries; int num_dcache_entries;
union { union {
@@ -896,11 +897,9 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge)
static void intel_enable_gtt(void) static void intel_enable_gtt(void)
{ {
u32 ptetbl_addr, gma_addr; u32 gma_addr;
u16 gmch_ctrl; u16 gmch_ctrl;
ptetbl_addr = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
if (INTEL_GTT_GEN == 2) if (INTEL_GTT_GEN == 2)
pci_read_config_dword(intel_private.pcidev, I810_GMADDR, pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
&gma_addr); &gma_addr);
@@ -914,7 +913,8 @@ static void intel_enable_gtt(void)
gmch_ctrl |= I830_GMCH_ENABLED; gmch_ctrl |= I830_GMCH_ENABLED;
pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl); pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl);
writel(ptetbl_addr|I810_PGETBL_ENABLED, intel_private.registers+I810_PGETBL_CTL); writel(intel_private.pte_bus_addr|I810_PGETBL_ENABLED,
intel_private.registers+I810_PGETBL_CTL);
readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */
} }
@@ -930,6 +930,8 @@ static int i830_setup(void)
return -ENOMEM; return -ENOMEM;
intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE;
intel_private.pte_bus_addr =
readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
intel_i830_setup_flush(); intel_i830_setup_flush();
@@ -1279,6 +1281,7 @@ static int i9xx_setup(void)
if (INTEL_GTT_GEN == 3) { if (INTEL_GTT_GEN == 3) {
u32 gtt_addr; u32 gtt_addr;
pci_read_config_dword(intel_private.pcidev, pci_read_config_dword(intel_private.pcidev,
I915_PTEADDR, &gtt_addr); I915_PTEADDR, &gtt_addr);
intel_private.gtt_bus_addr = gtt_addr; intel_private.gtt_bus_addr = gtt_addr;
@@ -1298,6 +1301,9 @@ static int i9xx_setup(void)
intel_private.gtt_bus_addr = reg_addr + gtt_offset; intel_private.gtt_bus_addr = reg_addr + gtt_offset;
} }
intel_private.pte_bus_addr =
readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
intel_i9xx_setup_flush(); intel_i9xx_setup_flush();
return 0; return 0;