Merge x86-64 update from Andi
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@ -71,10 +71,11 @@ struct per_cpu_pageset {
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#endif
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#define ZONE_DMA 0
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#define ZONE_NORMAL 1
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#define ZONE_HIGHMEM 2
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#define ZONE_DMA32 1
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#define ZONE_NORMAL 2
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#define ZONE_HIGHMEM 3
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#define MAX_NR_ZONES 3 /* Sync this with ZONES_SHIFT */
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#define MAX_NR_ZONES 4 /* Sync this with ZONES_SHIFT */
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#define ZONES_SHIFT 2 /* ceil(log2(MAX_NR_ZONES)) */
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@ -108,9 +109,10 @@ struct per_cpu_pageset {
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/*
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* On machines where it is needed (eg PCs) we divide physical memory
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* into multiple physical zones. On a PC we have 3 zones:
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* into multiple physical zones. On a PC we have 4 zones:
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*
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* ZONE_DMA < 16 MB ISA DMA capable memory
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* ZONE_DMA32 0 MB Empty
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* ZONE_NORMAL 16-896 MB direct mapped by the kernel
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* ZONE_HIGHMEM > 896 MB only page cache and user processes
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*/
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@ -433,7 +435,9 @@ int lowmem_reserve_ratio_sysctl_handler(struct ctl_table *, int, struct file *,
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#include <linux/topology.h>
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/* Returns the number of the current Node. */
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#ifndef numa_node_id
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#define numa_node_id() (cpu_to_node(raw_smp_processor_id()))
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#endif
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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@ -453,12 +457,12 @@ extern struct pglist_data contig_page_data;
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#include <asm/sparsemem.h>
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#endif
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#if BITS_PER_LONG == 32 || defined(ARCH_HAS_ATOMIC_UNSIGNED)
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#if BITS_PER_LONG == 32
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/*
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* with 32 bit page->flags field, we reserve 8 bits for node/zone info.
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* there are 3 zones (2 bits) and this leaves 8-2=6 bits for nodes.
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* with 32 bit page->flags field, we reserve 9 bits for node/zone info.
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* there are 4 zones (3 bits) and this leaves 9-3=6 bits for nodes.
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*/
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#define FLAGS_RESERVED 8
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#define FLAGS_RESERVED 9
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#elif BITS_PER_LONG == 64
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/*
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