omap1: Use gen_nand
Since omapnand driver never find its way into mainline, switch to gen_nand instead. Following patch is compile tested only, but it is based on code I wrote for NetStar board and runtime tested it there. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Cc: Imre Deak <imre.deak@nokia.com> Cc: Brian Swetland <swetland@google.com> Cc: Kevin Hilman <kjh@hilman.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
committed by
Tony Lindgren
parent
e2b18e3018
commit
414f552ad8
@@ -31,7 +31,6 @@
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#include <mach/gpio.h>
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#include <mach/gpio.h>
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#include <plat/mux.h>
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#include <plat/mux.h>
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#include <plat/fpga.h>
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#include <plat/fpga.h>
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#include <plat/nand.h>
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#include <plat/keypad.h>
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#include <plat/keypad.h>
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#include <plat/common.h>
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#include <plat/common.h>
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#include <plat/board.h>
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#include <plat/board.h>
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@@ -174,8 +173,40 @@ static struct platform_device nor_device = {
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.resource = &nor_resource,
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.resource = &nor_resource,
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};
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};
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static struct omap_nand_platform_data nand_data = {
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static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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.options = NAND_SAMSUNG_LP_OPTIONS,
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{
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struct nand_chip *this = mtd->priv;
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unsigned long mask;
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if (cmd == NAND_CMD_NONE)
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return;
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mask = (ctrl & NAND_CLE) ? 0x02 : 0;
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if (ctrl & NAND_ALE)
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mask |= 0x04;
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writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
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}
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#define FSAMPLE_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
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}
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static const char *part_probes[] = { "cmdlinepart", NULL };
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static struct platform_nand_data nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = part_probes,
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},
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.ctrl = {
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.cmd_ctrl = nand_cmd_ctl,
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.dev_ready = nand_dev_ready,
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},
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};
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};
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static struct resource nand_resource = {
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static struct resource nand_resource = {
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@@ -185,7 +216,7 @@ static struct resource nand_resource = {
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};
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};
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static struct platform_device nand_device = {
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static struct platform_device nand_device = {
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.name = "omapnand",
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.name = "gen_nand",
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.id = 0,
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.id = 0,
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.dev = {
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.dev = {
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.platform_data = &nand_data,
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.platform_data = &nand_data,
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@@ -243,13 +274,6 @@ static struct platform_device *devices[] __initdata = {
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&lcd_device,
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&lcd_device,
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};
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};
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#define P2_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct omap_nand_platform_data *data)
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{
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return gpio_get_value(P2_NAND_RB_GPIO_PIN);
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}
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static struct omap_lcd_config fsample_lcd_config __initdata = {
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static struct omap_lcd_config fsample_lcd_config __initdata = {
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.ctrl_name = "internal",
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.ctrl_name = "internal",
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};
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};
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@@ -260,9 +284,9 @@ static struct omap_board_config_kernel fsample_config[] = {
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static void __init omap_fsample_init(void)
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static void __init omap_fsample_init(void)
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{
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{
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if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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BUG();
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BUG();
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nand_data.dev_ready = nand_dev_ready;
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gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
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omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
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omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
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omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
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omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
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@@ -41,7 +41,6 @@
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#include <plat/mux.h>
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#include <plat/mux.h>
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#include <plat/dma.h>
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#include <plat/dma.h>
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#include <plat/tc.h>
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#include <plat/tc.h>
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#include <plat/nand.h>
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#include <plat/irda.h>
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#include <plat/irda.h>
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#include <plat/usb.h>
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#include <plat/usb.h>
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#include <plat/keypad.h>
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#include <plat/keypad.h>
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@@ -180,11 +179,43 @@ static struct mtd_partition h2_nand_partitions[] = {
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},
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},
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};
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};
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/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
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static void h2_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static struct omap_nand_platform_data h2_nand_data = {
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{
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.options = NAND_SAMSUNG_LP_OPTIONS,
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struct nand_chip *this = mtd->priv;
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.parts = h2_nand_partitions,
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unsigned long mask;
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.nr_parts = ARRAY_SIZE(h2_nand_partitions),
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if (cmd == NAND_CMD_NONE)
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return;
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mask = (ctrl & NAND_CLE) ? 0x02 : 0;
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if (ctrl & NAND_ALE)
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mask |= 0x04;
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writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
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}
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#define H2_NAND_RB_GPIO_PIN 62
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static int h2_nand_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(H2_NAND_RB_GPIO_PIN);
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}
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static const char *h2_part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data h2_nand_platdata = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.nr_partitions = ARRAY_SIZE(h2_nand_partitions),
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.partitions = h2_nand_partitions,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = h2_part_probes,
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},
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.ctrl = {
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.cmd_ctrl = h2_nand_cmd_ctl,
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.dev_ready = h2_nand_dev_ready,
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},
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};
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};
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static struct resource h2_nand_resource = {
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static struct resource h2_nand_resource = {
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@@ -192,10 +223,10 @@ static struct resource h2_nand_resource = {
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};
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};
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static struct platform_device h2_nand_device = {
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static struct platform_device h2_nand_device = {
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.name = "omapnand",
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.name = "gen_nand",
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.id = 0,
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.id = 0,
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.dev = {
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.dev = {
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.platform_data = &h2_nand_data,
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.platform_data = &h2_nand_platdata,
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},
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},
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.num_resources = 1,
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.num_resources = 1,
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.resource = &h2_nand_resource,
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.resource = &h2_nand_resource,
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@@ -378,8 +409,6 @@ static struct omap_board_config_kernel h2_config[] __initdata = {
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{ OMAP_TAG_LCD, &h2_lcd_config },
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{ OMAP_TAG_LCD, &h2_lcd_config },
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};
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};
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#define H2_NAND_RB_GPIO_PIN 62
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static void __init h2_init(void)
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static void __init h2_init(void)
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{
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{
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/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
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/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
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@@ -43,7 +43,6 @@
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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#include <plat/mux.h>
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#include <plat/mux.h>
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#include <plat/tc.h>
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#include <plat/tc.h>
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#include <plat/nand.h>
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#include <plat/usb.h>
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#include <plat/usb.h>
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#include <plat/keypad.h>
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#include <plat/keypad.h>
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#include <plat/dma.h>
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#include <plat/dma.h>
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@@ -182,11 +181,43 @@ static struct mtd_partition nand_partitions[] = {
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},
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},
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};
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};
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/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
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static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static struct omap_nand_platform_data nand_data = {
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{
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.options = NAND_SAMSUNG_LP_OPTIONS,
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struct nand_chip *this = mtd->priv;
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.parts = nand_partitions,
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unsigned long mask;
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.nr_parts = ARRAY_SIZE(nand_partitions),
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if (cmd == NAND_CMD_NONE)
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return;
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mask = (ctrl & NAND_CLE) ? 0x02 : 0;
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if (ctrl & NAND_ALE)
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mask |= 0x04;
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writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
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}
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#define H3_NAND_RB_GPIO_PIN 10
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static int nand_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(H3_NAND_RB_GPIO_PIN);
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}
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static const char *part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data nand_platdata = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.nr_partitions = ARRAY_SIZE(nand_partitions),
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.partitions = nand_partitions,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = part_probes,
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},
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.ctrl = {
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.cmd_ctrl = nand_cmd_ctl,
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.dev_ready = nand_dev_ready,
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},
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};
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};
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static struct resource nand_resource = {
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static struct resource nand_resource = {
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@@ -194,10 +225,10 @@ static struct resource nand_resource = {
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};
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};
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static struct platform_device nand_device = {
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static struct platform_device nand_device = {
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.name = "omapnand",
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.name = "gen_nand",
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.id = 0,
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.id = 0,
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.dev = {
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.dev = {
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.platform_data = &nand_data,
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.platform_data = &nand_platdata,
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},
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},
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.num_resources = 1,
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.num_resources = 1,
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.resource = &nand_resource,
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.resource = &nand_resource,
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@@ -342,13 +373,6 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = {
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},
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},
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};
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};
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#define H3_NAND_RB_GPIO_PIN 10
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static int nand_dev_ready(struct omap_nand_platform_data *data)
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{
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return gpio_get_value(H3_NAND_RB_GPIO_PIN);
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}
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static void __init h3_init(void)
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static void __init h3_init(void)
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{
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{
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/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
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/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
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@@ -366,7 +390,7 @@ static void __init h3_init(void)
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nand_resource.end += SZ_4K - 1;
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nand_resource.end += SZ_4K - 1;
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if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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BUG();
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BUG();
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nand_data.dev_ready = nand_dev_ready;
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gpio_direction_input(H3_NAND_RB_GPIO_PIN);
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/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
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/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
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/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
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/* GPIO10 pullup/down register, Enable pullup on GPIO10 */
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@@ -31,7 +31,6 @@
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#include <mach/gpio.h>
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#include <mach/gpio.h>
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#include <plat/mux.h>
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#include <plat/mux.h>
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#include <plat/fpga.h>
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#include <plat/fpga.h>
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#include <plat/nand.h>
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#include <plat/keypad.h>
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#include <plat/keypad.h>
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#include <plat/common.h>
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#include <plat/common.h>
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#include <plat/board.h>
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#include <plat/board.h>
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@@ -141,8 +140,40 @@ static struct platform_device nor_device = {
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.resource = &nor_resource,
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.resource = &nor_resource,
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};
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};
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static struct omap_nand_platform_data nand_data = {
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static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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.options = NAND_SAMSUNG_LP_OPTIONS,
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{
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struct nand_chip *this = mtd->priv;
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unsigned long mask;
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if (cmd == NAND_CMD_NONE)
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return;
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mask = (ctrl & NAND_CLE) ? 0x02 : 0;
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if (ctrl & NAND_ALE)
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mask |= 0x04;
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writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
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}
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#define P2_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(P2_NAND_RB_GPIO_PIN);
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}
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static const char *part_probes[] = { "cmdlinepart", NULL };
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static struct platform_nand_data nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = part_probes,
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},
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.ctrl = {
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.cmd_ctrl = nand_cmd_ctl,
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.dev_ready = nand_dev_ready,
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},
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};
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};
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static struct resource nand_resource = {
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static struct resource nand_resource = {
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@@ -152,7 +183,7 @@ static struct resource nand_resource = {
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};
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};
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static struct platform_device nand_device = {
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static struct platform_device nand_device = {
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.name = "omapnand",
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.name = "gen_nand",
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.id = 0,
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.id = 0,
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.dev = {
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.dev = {
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.platform_data = &nand_data,
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.platform_data = &nand_data,
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@@ -211,13 +242,6 @@ static struct platform_device *devices[] __initdata = {
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&lcd_device,
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&lcd_device,
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};
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};
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#define P2_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct omap_nand_platform_data *data)
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{
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return gpio_get_value(P2_NAND_RB_GPIO_PIN);
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}
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static struct omap_lcd_config perseus2_lcd_config __initdata = {
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static struct omap_lcd_config perseus2_lcd_config __initdata = {
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.ctrl_name = "internal",
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.ctrl_name = "internal",
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};
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};
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@@ -230,7 +254,7 @@ static void __init omap_perseus2_init(void)
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{
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{
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if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
|
||||||
BUG();
|
BUG();
|
||||||
nand_data.dev_ready = nand_dev_ready;
|
gpio_direction_input(P2_NAND_RB_GPIO_PIN);
|
||||||
|
|
||||||
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
|
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
|
||||||
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
|
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
|
||||||
|
Reference in New Issue
Block a user