[MIPS] MT: Improved multithreading support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@@ -76,6 +76,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
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mask_msc_irq(irq);
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if (!cpu_has_veic)
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MSCIC_WRITE(MSC01_IC_EOI, 0);
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#ifdef CONFIG_MIPS_MT_SMTC
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/* This actually needs to be a call into platform code */
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if (irq_hwmask[irq] & ST0_IM)
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set_c0_status(irq_hwmask[irq] & ST0_IM);
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#endif /* CONFIG_MIPS_MT_SMTC */
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}
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/*
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@@ -92,6 +97,10 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
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MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
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MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
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}
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#ifdef CONFIG_MIPS_MT_SMTC
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if (irq_hwmask[irq] & ST0_IM)
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set_c0_status(irq_hwmask[irq] & ST0_IM);
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#endif /* CONFIG_MIPS_MT_SMTC */
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}
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/*
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