PCI Hotplug: cpqphp: fix comment style
Fix up comments from C++ to C-style, wrapping if necessary, etc. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
committed by
Jesse Barnes
parent
861fefbf55
commit
427438c61b
@@ -178,17 +178,17 @@ int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
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if (!rc)
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return !rc;
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// set the Edge Level Control Register (ELCR)
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/* set the Edge Level Control Register (ELCR) */
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temp_word = inb(0x4d0);
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temp_word |= inb(0x4d1) << 8;
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temp_word |= 0x01 << irq_num;
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// This should only be for x86 as it sets the Edge Level Control Register
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outb((u8) (temp_word & 0xFF), 0x4d0);
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outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
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rc = 0;
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}
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/* This should only be for x86 as it sets the Edge Level
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* Control Register
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*/
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outb((u8) (temp_word & 0xFF), 0x4d0); outb((u8) ((temp_word &
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0xFF00) >> 8), 0x4d1); rc = 0; }
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return rc;
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}
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@@ -213,11 +213,11 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
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ctrl->pci_bus->number = bus_num;
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for (tdevice = 0; tdevice < 0xFF; tdevice++) {
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//Scan for access first
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/* Scan for access first */
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if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
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continue;
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dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
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//Yep we got one. Not a bridge ?
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/* Yep we got one. Not a bridge ? */
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if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
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*dev_num = tdevice;
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dbg("found it !\n");
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@@ -225,11 +225,11 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
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}
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}
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for (tdevice = 0; tdevice < 0xFF; tdevice++) {
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//Scan for access first
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/* Scan for access first */
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if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
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continue;
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dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
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//Yep we got one. bridge ?
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/* Yep we got one. bridge ? */
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if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
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pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
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dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
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@@ -257,7 +257,7 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
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len = (PCIIRQRoutingInfoLength->size -
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sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
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// Make sure I got at least one entry
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/* Make sure I got at least one entry */
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if (len == 0) {
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kfree(PCIIRQRoutingInfoLength );
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return -1;
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@@ -304,11 +304,14 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
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int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
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{
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return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0); //plain (bridges allowed)
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/* plain (bridges allowed) */
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return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);
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}
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/* More PCI configuration routines; this time centered around hotplug controller */
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/* More PCI configuration routines; this time centered around hotplug
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* controller
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*/
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/*
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@@ -339,12 +342,12 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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int stop_it;
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int index;
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// Decide which slots are supported
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/* Decide which slots are supported */
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if (is_hot_plug) {
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//*********************************
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// is_hot_plug is the slot mask
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//*********************************
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/*
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* is_hot_plug is the slot mask
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*/
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FirstSupported = is_hot_plug >> 4;
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LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
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} else {
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@@ -352,13 +355,13 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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LastSupported = 0x1F;
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}
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// Save PCI configuration space for all devices in supported slots
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/* Save PCI configuration space for all devices in supported slots */
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ctrl->pci_bus->number = busnumber;
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for (device = FirstSupported; device <= LastSupported; device++) {
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ID = 0xFFFFFFFF;
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rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
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if (ID != 0xFFFFFFFF) { // device in slot
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if (ID != 0xFFFFFFFF) { /* device in slot */
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rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
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if (rc)
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return rc;
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@@ -367,7 +370,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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if (rc)
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return rc;
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// If multi-function device, set max_functions to 8
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/* If multi-function device, set max_functions to 8 */
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if (header_type & 0x80)
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max_functions = 8;
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else
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@@ -377,18 +380,19 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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do {
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DevError = 0;
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // P-P Bridge
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// Recurse the subordinate bus
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// get the subordinate bus number
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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/* Recurse the subordinate bus
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* get the subordinate bus number
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*/
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rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
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if (rc) {
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return rc;
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} else {
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sub_bus = (int) secondary_bus;
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// Save secondary bus cfg spc
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// with this recursive call.
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/* Save secondary bus cfg spc
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* with this recursive call.
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*/
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rc = cpqhp_save_config(ctrl, sub_bus, 0);
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if (rc)
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return rc;
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@@ -403,7 +407,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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new_slot = cpqhp_slot_find(busnumber, device, index++);
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if (!new_slot) {
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// Setup slot structure.
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/* Setup slot structure. */
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new_slot = cpqhp_slot_create(busnumber);
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if (new_slot == NULL)
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@@ -415,7 +419,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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new_slot->function = (u8) function;
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new_slot->is_a_board = 1;
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new_slot->switch_save = 0x10;
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// In case of unsupported board
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/* In case of unsupported board */
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new_slot->status = DevError;
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new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
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@@ -429,14 +433,15 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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stop_it = 0;
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// this loop skips to the next present function
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// reading in Class Code and Header type.
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/* this loop skips to the next present function
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* reading in Class Code and Header type.
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*/
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while ((function < max_functions)&&(!stop_it)) {
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rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
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if (ID == 0xFFFFFFFF) { // nothing there.
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if (ID == 0xFFFFFFFF) { /* nothing there. */
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function++;
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} else { // Something there
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} else { /* Something there */
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rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
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if (rc)
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return rc;
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@@ -450,9 +455,9 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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}
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} while (function < max_functions);
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} // End of IF (device in slot?)
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} /* End of IF (device in slot?) */
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else if (is_hot_plug) {
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// Setup slot structure with entry for empty slot
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/* Setup slot structure with entry for empty slot */
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new_slot = cpqhp_slot_create(busnumber);
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if (new_slot == NULL) {
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@@ -466,7 +471,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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new_slot->presence_save = 0;
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new_slot->switch_save = 0;
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}
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} // End of FOR loop
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} /* End of FOR loop */
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return(0);
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}
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@@ -498,11 +503,11 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
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ctrl->pci_bus->number = new_slot->bus;
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pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
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if (ID != 0xFFFFFFFF) { // device in slot
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if (ID != 0xFFFFFFFF) { /* device in slot */
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pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
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pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
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if (header_type & 0x80) // Multi-function device
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if (header_type & 0x80) /* Multi-function device */
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max_functions = 8;
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else
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max_functions = 1;
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@@ -510,19 +515,21 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
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function = 0;
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do {
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
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// Recurse the subordinate bus
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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/* Recurse the subordinate bus */
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pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
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sub_bus = (int) secondary_bus;
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// Save the config headers for the secondary bus.
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/* Save the config headers for the secondary
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* bus.
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*/
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rc = cpqhp_save_config(ctrl, sub_bus, 0);
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if (rc)
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return(rc);
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ctrl->pci_bus->number = new_slot->bus;
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} // End of IF
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} /* End of IF */
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new_slot->status = 0;
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@@ -534,15 +541,15 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
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stop_it = 0;
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// this loop skips to the next present function
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// reading in the Class Code and the Header type.
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/* this loop skips to the next present function
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* reading in the Class Code and the Header type.
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*/
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while ((function < max_functions) && (!stop_it)) {
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pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
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if (ID == 0xFFFFFFFF) { // nothing there.
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if (ID == 0xFFFFFFFF) { /* nothing there. */
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function++;
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} else { // Something there
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} else { /* Something there */
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pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
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pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
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@@ -552,7 +559,7 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
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}
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} while (function < max_functions);
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} // End of IF (device in slot?)
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} /* End of IF (device in slot?) */
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else {
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return 2;
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}
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@@ -590,11 +597,10 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
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pci_bus->number = func->bus;
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devfn = PCI_DEVFN(func->device, func->function);
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// Check for Bridge
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/* Check for Bridge */
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pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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// PCI-PCI Bridge
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pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
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sub_bus = (int) secondary_bus;
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@@ -610,23 +616,27 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
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}
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pci_bus->number = func->bus;
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//FIXME: this loop is duplicated in the non-bridge case. The two could be rolled together
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// Figure out IO and memory base lengths
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/* FIXME: this loop is duplicated in the non-bridge
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* case. The two could be rolled together Figure out
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* IO and memory base lengths
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*/
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for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
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temp_register = 0xFFFFFFFF;
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pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
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pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
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if (base) { // If this register is implemented
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/* If this register is implemented */
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if (base) {
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if (base & 0x01L) {
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// IO base
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// set base = amount of IO space requested
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/* IO base
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* set base = amount of IO space
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* requested
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*/
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base = base & 0xFFFFFFFE;
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base = (~base) + 1;
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type = 1;
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} else {
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// memory base
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/* memory base */
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base = base & 0xFFFFFFF0;
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base = (~base) + 1;
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@@ -637,32 +647,36 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
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type = 0;
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}
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// Save information in slot structure
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/* Save information in slot structure */
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func->base_length[(cloop - 0x10) >> 2] =
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base;
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func->base_type[(cloop - 0x10) >> 2] = type;
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} // End of base register loop
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} /* End of base register loop */
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} else if ((header_type & 0x7F) == 0x00) { // PCI-PCI Bridge
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// Figure out IO and memory base lengths
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} else if ((header_type & 0x7F) == 0x00) {
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/* Figure out IO and memory base lengths */
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for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
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temp_register = 0xFFFFFFFF;
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pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
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pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
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if (base) { // If this register is implemented
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/* If this register is implemented */
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if (base) {
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if (base & 0x01L) {
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// IO base
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// base = amount of IO space requested
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/* IO base
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* base = amount of IO space
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* requested
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*/
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base = base & 0xFFFFFFFE;
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base = (~base) + 1;
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type = 1;
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} else {
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// memory base
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// base = amount of memory space requested
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/* memory base
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* base = amount of memory
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* space requested
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*/
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base = base & 0xFFFFFFF0;
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base = (~base) + 1;
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@@ -673,16 +687,16 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
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type = 0;
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}
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// Save information in slot structure
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/* Save information in slot structure */
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func->base_length[(cloop - 0x10) >> 2] = base;
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func->base_type[(cloop - 0x10) >> 2] = type;
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} // End of base register loop
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} /* End of base register loop */
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} else { // Some other unknown header type
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} else { /* Some other unknown header type */
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}
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// find the next device in this slot
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/* find the next device in this slot */
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func = cpqhp_slot_find(func->bus, func->device, index++);
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}
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@@ -728,18 +742,18 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
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pci_bus->number = func->bus;
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devfn = PCI_DEVFN(func->device, func->function);
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// Save the command register
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/* Save the command register */
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pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
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// disable card
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/* disable card */
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command = 0x00;
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pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
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// Check for Bridge
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/* Check for Bridge */
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pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
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// Clear Bridge Control Register
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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/* Clear Bridge Control Register */
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command = 0x00;
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pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
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pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
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@@ -755,7 +769,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
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bus_node->next = func->bus_head;
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func->bus_head = bus_node;
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// Save IO base and Limit registers
|
||||
/* Save IO base and Limit registers */
|
||||
pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
|
||||
pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
|
||||
|
||||
@@ -771,7 +785,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
func->io_head = io_node;
|
||||
}
|
||||
|
||||
// Save memory base and Limit registers
|
||||
/* Save memory base and Limit registers */
|
||||
pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
|
||||
pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
|
||||
|
||||
@@ -787,7 +801,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
func->mem_head = mem_node;
|
||||
}
|
||||
|
||||
// Save prefetchable memory base and Limit registers
|
||||
/* Save prefetchable memory base and Limit registers */
|
||||
pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
|
||||
pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
|
||||
|
||||
@@ -802,7 +816,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
p_mem_node->next = func->p_mem_head;
|
||||
func->p_mem_head = p_mem_node;
|
||||
}
|
||||
// Figure out IO and memory base lengths
|
||||
/* Figure out IO and memory base lengths */
|
||||
for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
|
||||
pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
|
||||
|
||||
@@ -812,11 +826,14 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
|
||||
temp_register = base;
|
||||
|
||||
if (base) { // If this register is implemented
|
||||
/* If this register is implemented */
|
||||
if (base) {
|
||||
if (((base & 0x03L) == 0x01)
|
||||
&& (save_command & 0x01)) {
|
||||
// IO base
|
||||
// set temp_register = amount of IO space requested
|
||||
/* IO base
|
||||
* set temp_register = amount
|
||||
* of IO space requested
|
||||
*/
|
||||
temp_register = base & 0xFFFFFFFE;
|
||||
temp_register = (~temp_register) + 1;
|
||||
|
||||
@@ -834,7 +851,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
} else
|
||||
if (((base & 0x0BL) == 0x08)
|
||||
&& (save_command & 0x02)) {
|
||||
// prefetchable memory base
|
||||
/* prefetchable memory base */
|
||||
temp_register = base & 0xFFFFFFF0;
|
||||
temp_register = (~temp_register) + 1;
|
||||
|
||||
@@ -851,7 +868,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
} else
|
||||
if (((base & 0x0BL) == 0x00)
|
||||
&& (save_command & 0x02)) {
|
||||
// prefetchable memory base
|
||||
/* prefetchable memory base */
|
||||
temp_register = base & 0xFFFFFFF0;
|
||||
temp_register = (~temp_register) + 1;
|
||||
|
||||
@@ -868,9 +885,10 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
} else
|
||||
return(1);
|
||||
}
|
||||
} // End of base register loop
|
||||
} else if ((header_type & 0x7F) == 0x00) { // Standard header
|
||||
// Figure out IO and memory base lengths
|
||||
} /* End of base register loop */
|
||||
/* Standard header */
|
||||
} else if ((header_type & 0x7F) == 0x00) {
|
||||
/* Figure out IO and memory base lengths */
|
||||
for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
|
||||
pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
|
||||
|
||||
@@ -880,11 +898,14 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
|
||||
temp_register = base;
|
||||
|
||||
if (base) { // If this register is implemented
|
||||
/* If this register is implemented */
|
||||
if (base) {
|
||||
if (((base & 0x03L) == 0x01)
|
||||
&& (save_command & 0x01)) {
|
||||
// IO base
|
||||
// set temp_register = amount of IO space requested
|
||||
/* IO base
|
||||
* set temp_register = amount
|
||||
* of IO space requested
|
||||
*/
|
||||
temp_register = base & 0xFFFFFFFE;
|
||||
temp_register = (~temp_register) + 1;
|
||||
|
||||
@@ -901,7 +922,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
} else
|
||||
if (((base & 0x0BL) == 0x08)
|
||||
&& (save_command & 0x02)) {
|
||||
// prefetchable memory base
|
||||
/* prefetchable memory base */
|
||||
temp_register = base & 0xFFFFFFF0;
|
||||
temp_register = (~temp_register) + 1;
|
||||
|
||||
@@ -918,7 +939,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
} else
|
||||
if (((base & 0x0BL) == 0x00)
|
||||
&& (save_command & 0x02)) {
|
||||
// prefetchable memory base
|
||||
/* prefetchable memory base */
|
||||
temp_register = base & 0xFFFFFFF0;
|
||||
temp_register = (~temp_register) + 1;
|
||||
|
||||
@@ -935,11 +956,12 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
|
||||
} else
|
||||
return(1);
|
||||
}
|
||||
} // End of base register loop
|
||||
} else { // Some other unknown header type
|
||||
} /* End of base register loop */
|
||||
/* Some other unknown header type */
|
||||
} else {
|
||||
}
|
||||
|
||||
// find the next device in this slot
|
||||
/* find the next device in this slot */
|
||||
func = cpqhp_slot_find(func->bus, func->device, index++);
|
||||
}
|
||||
|
||||
@@ -975,16 +997,17 @@ int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
|
||||
pci_bus->number = func->bus;
|
||||
devfn = PCI_DEVFN(func->device, func->function);
|
||||
|
||||
// Start at the top of config space so that the control
|
||||
// registers are programmed last
|
||||
/* Start at the top of config space so that the control
|
||||
* registers are programmed last
|
||||
*/
|
||||
for (cloop = 0x3C; cloop > 0; cloop -= 4) {
|
||||
pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
|
||||
}
|
||||
|
||||
pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
|
||||
|
||||
// If this is a bridge device, restore subordinate devices
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
|
||||
/* If this is a bridge device, restore subordinate devices */
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
|
||||
|
||||
sub_bus = (int) secondary_bus;
|
||||
@@ -1000,8 +1023,9 @@ int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
|
||||
}
|
||||
} else {
|
||||
|
||||
// Check all the base Address Registers to make sure
|
||||
// they are the same. If not, the board is different.
|
||||
/* Check all the base Address Registers to make sure
|
||||
* they are the same. If not, the board is different.
|
||||
*/
|
||||
|
||||
for (cloop = 16; cloop < 40; cloop += 4) {
|
||||
pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
|
||||
@@ -1058,27 +1082,28 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
|
||||
|
||||
pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
|
||||
|
||||
// No adapter present
|
||||
/* No adapter present */
|
||||
if (temp_register == 0xFFFFFFFF)
|
||||
return(NO_ADAPTER_PRESENT);
|
||||
|
||||
if (temp_register != func->config_space[0])
|
||||
return(ADAPTER_NOT_SAME);
|
||||
|
||||
// Check for same revision number and class code
|
||||
/* Check for same revision number and class code */
|
||||
pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
|
||||
|
||||
// Adapter not the same
|
||||
/* Adapter not the same */
|
||||
if (temp_register != func->config_space[0x08 >> 2])
|
||||
return(ADAPTER_NOT_SAME);
|
||||
|
||||
// Check for Bridge
|
||||
/* Check for Bridge */
|
||||
pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
|
||||
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge
|
||||
// In order to continue checking, we must program the
|
||||
// bus registers in the bridge to respond to accesses
|
||||
// for it's subordinate bus(es)
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
/* In order to continue checking, we must program the
|
||||
* bus registers in the bridge to respond to accesses
|
||||
* for its subordinate bus(es)
|
||||
*/
|
||||
|
||||
temp_register = func->config_space[0x18 >> 2];
|
||||
pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
|
||||
@@ -1096,35 +1121,39 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
|
||||
}
|
||||
|
||||
}
|
||||
// Check to see if it is a standard config header
|
||||
/* Check to see if it is a standard config header */
|
||||
else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
|
||||
// Check subsystem vendor and ID
|
||||
/* Check subsystem vendor and ID */
|
||||
pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
|
||||
|
||||
if (temp_register != func->config_space[0x2C >> 2]) {
|
||||
// If it's a SMART-2 and the register isn't filled
|
||||
// in, ignore the difference because
|
||||
// they just have an old rev of the firmware
|
||||
|
||||
/* If it's a SMART-2 and the register isn't
|
||||
* filled in, ignore the difference because
|
||||
* they just have an old rev of the firmware
|
||||
*/
|
||||
if (!((func->config_space[0] == 0xAE100E11)
|
||||
&& (temp_register == 0x00L)))
|
||||
return(ADAPTER_NOT_SAME);
|
||||
}
|
||||
// Figure out IO and memory base lengths
|
||||
/* Figure out IO and memory base lengths */
|
||||
for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
|
||||
temp_register = 0xFFFFFFFF;
|
||||
pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
|
||||
pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
|
||||
if (base) { // If this register is implemented
|
||||
|
||||
/* If this register is implemented */
|
||||
if (base) {
|
||||
if (base & 0x01L) {
|
||||
// IO base
|
||||
// set base = amount of IO space requested
|
||||
/* IO base
|
||||
* set base = amount of IO
|
||||
* space requested
|
||||
*/
|
||||
base = base & 0xFFFFFFFE;
|
||||
base = (~base) + 1;
|
||||
|
||||
type = 1;
|
||||
} else {
|
||||
// memory base
|
||||
/* memory base */
|
||||
base = base & 0xFFFFFFF0;
|
||||
base = (~base) + 1;
|
||||
|
||||
@@ -1135,23 +1164,24 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
|
||||
type = 0;
|
||||
}
|
||||
|
||||
// Check information in slot structure
|
||||
/* Check information in slot structure */
|
||||
if (func->base_length[(cloop - 0x10) >> 2] != base)
|
||||
return(ADAPTER_NOT_SAME);
|
||||
|
||||
if (func->base_type[(cloop - 0x10) >> 2] != type)
|
||||
return(ADAPTER_NOT_SAME);
|
||||
|
||||
} // End of base register loop
|
||||
} /* End of base register loop */
|
||||
|
||||
} // End of (type 0 config space) else
|
||||
} /* End of (type 0 config space) else */
|
||||
else {
|
||||
// this is not a type 0 or 1 config space header so
|
||||
// we don't know how to do it
|
||||
/* this is not a type 0 or 1 config space header so
|
||||
* we don't know how to do it
|
||||
*/
|
||||
return(DEVICE_TYPE_NOT_SUPPORTED);
|
||||
}
|
||||
|
||||
// Get the next function
|
||||
/* Get the next function */
|
||||
func = cpqhp_slot_find(func->bus, func->device, index++);
|
||||
}
|
||||
|
||||
@@ -1190,7 +1220,7 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
if (rom_resource_table == NULL) {
|
||||
return -ENODEV;
|
||||
}
|
||||
// Sum all resources and setup resource maps
|
||||
/* Sum all resources and setup resource maps */
|
||||
unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
|
||||
dbg("unused_IRQ = %x\n", unused_IRQ);
|
||||
|
||||
@@ -1262,13 +1292,13 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
|
||||
primary_bus, secondary_bus, max_bus);
|
||||
|
||||
// If this entry isn't for our controller's bus, ignore it
|
||||
/* If this entry isn't for our controller's bus, ignore it */
|
||||
if (primary_bus != ctrl->bus) {
|
||||
i--;
|
||||
one_slot += sizeof (struct slot_rt);
|
||||
continue;
|
||||
}
|
||||
// find out if this entry is for an occupied slot
|
||||
/* find out if this entry is for an occupied slot */
|
||||
ctrl->pci_bus->number = primary_bus;
|
||||
pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
|
||||
dbg("temp_D_word = %x\n", temp_dword);
|
||||
@@ -1282,13 +1312,13 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
|
||||
}
|
||||
|
||||
// If we can't find a match, skip this table entry
|
||||
/* If we can't find a match, skip this table entry */
|
||||
if (!func) {
|
||||
i--;
|
||||
one_slot += sizeof (struct slot_rt);
|
||||
continue;
|
||||
}
|
||||
// this may not work and shouldn't be used
|
||||
/* this may not work and shouldn't be used */
|
||||
if (secondary_bus != primary_bus)
|
||||
bridged_slot = 1;
|
||||
else
|
||||
@@ -1301,7 +1331,7 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
}
|
||||
|
||||
|
||||
// If we've got a valid IO base, use it
|
||||
/* If we've got a valid IO base, use it */
|
||||
|
||||
temp_dword = io_base + io_length;
|
||||
|
||||
@@ -1325,7 +1355,7 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
}
|
||||
}
|
||||
|
||||
// If we've got a valid memory base, use it
|
||||
/* If we've got a valid memory base, use it */
|
||||
temp_dword = mem_base + mem_length;
|
||||
if ((mem_base) && (temp_dword < 0x10000)) {
|
||||
mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
|
||||
@@ -1348,8 +1378,9 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
}
|
||||
}
|
||||
|
||||
// If we've got a valid prefetchable memory base, and
|
||||
// the base + length isn't greater than 0xFFFF
|
||||
/* If we've got a valid prefetchable memory base, and
|
||||
* the base + length isn't greater than 0xFFFF
|
||||
*/
|
||||
temp_dword = pre_mem_base + pre_mem_length;
|
||||
if ((pre_mem_base) && (temp_dword < 0x10000)) {
|
||||
p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
|
||||
@@ -1372,9 +1403,10 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
}
|
||||
}
|
||||
|
||||
// If we've got a valid bus number, use it
|
||||
// The second condition is to ignore bus numbers on
|
||||
// populated slots that don't have PCI-PCI bridges
|
||||
/* If we've got a valid bus number, use it
|
||||
* The second condition is to ignore bus numbers on
|
||||
* populated slots that don't have PCI-PCI bridges
|
||||
*/
|
||||
if (secondary_bus && (secondary_bus != primary_bus)) {
|
||||
bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
|
||||
if (!bus_node)
|
||||
@@ -1398,8 +1430,9 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
|
||||
one_slot += sizeof (struct slot_rt);
|
||||
}
|
||||
|
||||
// If all of the following fail, we don't have any resources for
|
||||
// hot plug add
|
||||
/* If all of the following fail, we don't have any resources for
|
||||
* hot plug add
|
||||
*/
|
||||
rc = 1;
|
||||
rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
|
||||
rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
|
||||
|
Reference in New Issue
Block a user