m68knommu: fix ColdFire timer off by 1
The coldfire timer runs from 0 to TRR included, then 0 again and so on. It counts thus actually TRR + 1 steps for 1 tick, not TRR. Fix that. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
committed by
Linus Torvalds
parent
4a0df2ef45
commit
4342f4ace2
@@ -62,10 +62,13 @@ void coldfire_tick(void)
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/***************************************************************************/
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/***************************************************************************/
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static int ticks_per_intr;
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void coldfire_timer_init(irq_handler_t handler)
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void coldfire_timer_init(irq_handler_t handler)
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{
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{
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__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
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__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
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__raw_writetrr(((MCF_BUSCLK / 16) / HZ), TA(MCFTIMER_TRR));
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ticks_per_intr = (MCF_BUSCLK / 16) / HZ;
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__raw_writetrr(ticks_per_intr - 1, TA(MCFTIMER_TRR));
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
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@@ -81,11 +84,10 @@ void coldfire_timer_init(irq_handler_t handler)
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unsigned long coldfire_timer_offset(void)
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unsigned long coldfire_timer_offset(void)
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{
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{
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unsigned long trr, tcn, offset;
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unsigned long tcn, offset;
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tcn = __raw_readw(TA(MCFTIMER_TCN));
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tcn = __raw_readw(TA(MCFTIMER_TCN));
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trr = __raw_readtrr(TA(MCFTIMER_TRR));
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offset = ((tcn + 1) * (1000000 / HZ)) / ticks_per_intr;
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offset = (tcn * (1000000 / HZ)) / trr;
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/* Check if we just wrapped the counters and maybe missed a tick */
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/* Check if we just wrapped the counters and maybe missed a tick */
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if ((offset < (1000000 / HZ / 2)) && mcf_timerirqpending(1))
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if ((offset < (1000000 / HZ / 2)) && mcf_timerirqpending(1))
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