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[ARM] OMAP2xxx clock: consolidate DELAYED_APP clock commits; fix barrier

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Consolidate the commit code for DELAYED_APP clocks into a subroutine,
_omap2xxx_clk_commit().  Also convert the MPU barrier wmb() into an
OCP barrier, since with an MPU barrier, we have no guarantee that the
write actually reached the endpoint device.

linux-omap source commit is 0f5bdb736515801b296125d16937a21ff7b3cfdc.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Paul Walmsley
2009-01-28 12:35:03 -07:00
committed by Russell King
parent de07fedd79
commit 439764cc18
1 changed files with 24 additions and 9 deletions
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33
arch/arm/mach-omap2/clock.c
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@@ -74,6 +74,28 @@ u8 cpu_mask;
* OMAP2/3 specific clock functions * OMAP2/3 specific clock functions
*-------------------------------------------------------------------------*/ *-------------------------------------------------------------------------*/
/**
* _omap2xxx_clk_commit - commit clock parent/rate changes in hardware
* @clk: struct clk *
*
* If @clk has the DELAYED_APP flag set, meaning that parent/rate changes
* don't take effect until the VALID_CONFIG bit is written, write the
* VALID_CONFIG bit and wait for the write to complete. No return value.
*/
static void _omap2xxx_clk_commit(struct clk *clk)
{
if (!cpu_is_omap24xx())
return;
if (!(clk->flags & DELAYED_APP))
return;
prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD,
OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
/* OCP barrier */
prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
}
/* /*
* _dpll_test_fint - test whether an Fint value is valid for the DPLL * _dpll_test_fint - test whether an Fint value is valid for the DPLL
* @clk: DPLL struct clk to test * @clk: DPLL struct clk to test
@@ -685,11 +707,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
clk->rate = clk->parent->rate / new_div; clk->rate = clk->parent->rate / new_div;
if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { _omap2xxx_clk_commit(clk);
prm_write_mod_reg(OMAP24XX_VALID_CONFIG,
OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
wmb();
}
return 0; return 0;
} }
@@ -772,10 +790,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
__raw_writel(v, clk->clksel_reg); __raw_writel(v, clk->clksel_reg);
wmb(); wmb();
if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { _omap2xxx_clk_commit(clk);
__raw_writel(OMAP24XX_VALID_CONFIG, OMAP24XX_PRCM_CLKCFG_CTRL);
wmb();
}
if (clk->usecount > 0) if (clk->usecount > 0)
_omap2_clk_enable(clk); _omap2_clk_enable(clk);