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ARM: OMAP2: Change 24xx to use new register access

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This patch changes 24xx to use new register access, except for clock
framework. Clock framework register access will get updates in the
next patch.

Note that board-*.c files change GPMC (General Purpose Memory Controller)
access to use gpmc_cs_write_reg() instead of accessing the registers
directly. The code also uses gpmc_fck instead of it's parent clock
core_l3_ck for GPMC clock.

The H4 board file also adds h4_init_flash() function, which specify the
flash start and end addresses.

Also note that sleep.S removes some unused registers addresses.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Paul Walmsley
2008-03-18 10:04:51 +02:00
committed by Tony Lindgren
parent c595713da7
commit 445959821f
15 changed files with 435 additions and 122 deletions
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47
arch/arm/plat-omap/common.c
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@@ -27,11 +27,16 @@
#include <asm/setup.h>
#include <asm/arch/board.h>
#include <asm/arch/control.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include <asm/arch/clock.h>
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
# include "../mach-omap2/sdrc.h"
#endif
#define NO_LENGTH_CHECK 0xffffffff
unsigned char omap_bootloader_tag[512];
@@ -171,8 +176,8 @@ console_initcall(omap_add_serial_console);
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#elif defined(CONFIG_ARCH_OMAP24XX)
#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10)
#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
#define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
#endif
#ifdef TIMER_32K_SYNCHRONIZED
@@ -215,7 +220,13 @@ static int __init omap_init_clocksource_32k(void)
static char err[] __initdata = KERN_ERR
"%s: can't register clocksource!\n";
if (cpu_is_omap16xx() || cpu_is_omap24xx()) {
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
struct clk *sync_32k_ick;
sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
if (sync_32k_ick)
clk_enable(sync_32k_ick);
clocksource_32k.mult = clocksource_hz2mult(32768,
clocksource_32k.shift);
@@ -227,3 +238,33 @@ static int __init omap_init_clocksource_32k(void)
arch_initcall(omap_init_clocksource_32k);
#endif /* TIMER_32K_SYNCHRONIZED */
/* Global address base setup code */
#if defined(CONFIG_ARCH_OMAP2420)
void __init omap2_set_globals_242x(void)
{
omap2_sdrc_base = OMAP2420_SDRC_BASE;
omap2_sms_base = OMAP2420_SMS_BASE;
omap_ctrl_base_set(OMAP2420_CTRL_BASE);
}
#endif
#if defined(CONFIG_ARCH_OMAP2430)
void __init omap2_set_globals_243x(void)
{
omap2_sdrc_base = OMAP243X_SDRC_BASE;
omap2_sms_base = OMAP243X_SMS_BASE;
omap_ctrl_base_set(OMAP243X_CTRL_BASE);
}
#endif
#if defined(CONFIG_ARCH_OMAP3430)
void __init omap2_set_globals_343x(void)
{
omap2_sdrc_base = OMAP343X_SDRC_BASE;
omap2_sms_base = OMAP343X_SMS_BASE;
omap_ctrl_base_set(OMAP343X_CTRL_BASE);
}
#endif