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drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB.

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They have been moved from the ringbuffer groups to their own group it
looks like.  Fixes GPU hangs on gnome startup.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Eric Anholt
2011-05-06 17:12:35 -07:00
committed by Keith Packard
parent 25aebfc30b
commit 4593010b68
2 changed files with 27 additions and 3 deletions
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3
drivers/gpu/drm/i915/i915_reg.h
View File

@@ -291,6 +291,9 @@
#define RING_MAX_IDLE(base) ((base)+0x54) #define RING_MAX_IDLE(base) ((base)+0x54)
#define RING_HWS_PGA(base) ((base)+0x80) #define RING_HWS_PGA(base) ((base)+0x80)
#define RING_HWS_PGA_GEN6(base) ((base)+0x2080) #define RING_HWS_PGA_GEN6(base) ((base)+0x2080)
#define RENDER_HWS_PGA_GEN7 (0x04080)
#define BSD_HWS_PGA_GEN7 (0x04180)
#define BLT_HWS_PGA_GEN7 (0x04280)
#define RING_ACTHD(base) ((base)+0x74) #define RING_ACTHD(base) ((base)+0x74)
#define RING_NOPID(base) ((base)+0x94) #define RING_NOPID(base) ((base)+0x94)
#define RING_IMR(base) ((base)+0xa8) #define RING_IMR(base) ((base)+0xa8)

27
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@@ -551,10 +551,31 @@ render_ring_put_irq(struct intel_ring_buffer *ring)
void intel_ring_setup_status_page(struct intel_ring_buffer *ring) void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
{ {
struct drm_device *dev = ring->dev;
drm_i915_private_t *dev_priv = ring->dev->dev_private; drm_i915_private_t *dev_priv = ring->dev->dev_private;
u32 mmio = (IS_GEN6(ring->dev) || IS_GEN7(ring->dev)) ? u32 mmio = 0;
RING_HWS_PGA_GEN6(ring->mmio_base) :
RING_HWS_PGA(ring->mmio_base); /* The ring status page addresses are no longer next to the rest of
* the ring registers as of gen7.
*/
if (IS_GEN7(dev)) {
switch (ring->id) {
case RING_RENDER:
mmio = RENDER_HWS_PGA_GEN7;
break;
case RING_BLT:
mmio = BLT_HWS_PGA_GEN7;
break;
case RING_BSD:
mmio = BSD_HWS_PGA_GEN7;
break;
}
} else if (IS_GEN6(ring->dev)) {
mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
} else {
mmio = RING_HWS_PGA(ring->mmio_base);
}
I915_WRITE(mmio, (u32)ring->status_page.gfx_addr); I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
POSTING_READ(mmio); POSTING_READ(mmio);
} }