Merge branch 'fixes-2.6.23' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge
This commit is contained in:
@@ -134,7 +134,7 @@ config BDI_SWITCH
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config BOOTX_TEXT
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config BOOTX_TEXT
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bool "Support for early boot text console (BootX or OpenFirmware only)"
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bool "Support for early boot text console (BootX or OpenFirmware only)"
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depends PPC_OF
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depends PPC_OF && PPC_MULTIPLATFORM
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help
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help
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Say Y here to see progress messages from the boot firmware in text
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Say Y here to see progress messages from the boot firmware in text
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mode. Requires either BootX or Open Firmware.
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mode. Requires either BootX or Open Firmware.
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@@ -45,7 +45,7 @@
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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device_type = "tsi108-bridge";
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device_type = "tsi-bridge";
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ranges = <00000000 c0000000 00010000>;
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ranges = <00000000 c0000000 00010000>;
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reg = <c0000000 00010000>;
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reg = <c0000000 00010000>;
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bus-frequency = <0>;
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bus-frequency = <0>;
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@@ -104,6 +104,7 @@
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interrupts = <1d 2 1e 2 22 2>;
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interrupts = <1d 2 1e 2 22 2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy0>;
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phy-handle = <&phy0>;
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phy-connection-type = "rgmii-id";
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};
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};
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ethernet@26000 {
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ethernet@26000 {
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@@ -117,6 +118,7 @@
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interrupts = <1f 2 20 2 21 2>;
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interrupts = <1f 2 20 2 21 2>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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phy-handle = <&phy1>;
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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};
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serial@4500 {
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serial@4500 {
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@@ -348,6 +350,12 @@
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};
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};
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,mpc8548-guts";
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reg = <e0000 1000>;
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fsl,has-rstcr;
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};
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mpic: pic@40000 {
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mpic: pic@40000 {
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clock-frequency = <0>;
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clock-frequency = <0>;
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interrupt-controller;
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interrupt-controller;
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@@ -170,6 +170,12 @@
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interrupt-parent = <&mpic>;
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interrupt-parent = <&mpic>;
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};
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};
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global-utilities@e0000 { //global utilities block
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compatible = "fsl,mpc8548-guts";
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reg = <e0000 1000>;
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fsl,has-rstcr;
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};
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pci@8000 {
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pci@8000 {
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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interrupt-map = <
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@@ -418,10 +418,10 @@ irq_hw_number_t virq_to_hw(unsigned int virq)
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}
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}
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EXPORT_SYMBOL_GPL(virq_to_hw);
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EXPORT_SYMBOL_GPL(virq_to_hw);
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struct irq_host *irq_alloc_host(unsigned int revmap_type,
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__init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
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unsigned int revmap_arg,
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unsigned int revmap_arg,
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struct irq_host_ops *ops,
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struct irq_host_ops *ops,
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irq_hw_number_t inval_irq)
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irq_hw_number_t inval_irq)
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{
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{
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struct irq_host *host;
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struct irq_host *host;
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unsigned int size = sizeof(struct irq_host);
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unsigned int size = sizeof(struct irq_host);
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@@ -65,7 +65,7 @@ static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
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spin_unlock(&hose_spinlock);
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spin_unlock(&hose_spinlock);
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}
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}
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struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
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__init_refok struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
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{
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{
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struct pci_controller *phb;
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struct pci_controller *phb;
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@@ -59,6 +59,24 @@ LIST_HEAD(hose_list);
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static int pci_bus_count;
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static int pci_bus_count;
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static void
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fixup_hide_host_resource_fsl(struct pci_dev* dev)
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{
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int i, class = dev->class >> 8;
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if ((class == PCI_CLASS_PROCESSOR_POWERPC) &&
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(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
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(dev->bus->parent == NULL)) {
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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dev->resource[i].start = 0;
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dev->resource[i].end = 0;
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dev->resource[i].flags = 0;
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}
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
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static void
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static void
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fixup_broken_pcnet32(struct pci_dev* dev)
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fixup_broken_pcnet32(struct pci_dev* dev)
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{
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{
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@@ -1229,7 +1247,7 @@ pcibios_init(void)
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subsys_initcall(pcibios_init);
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subsys_initcall(pcibios_init);
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void __init pcibios_fixup_bus(struct pci_bus *bus)
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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{
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struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
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struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
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unsigned long io_offset;
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unsigned long io_offset;
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@@ -423,7 +423,11 @@ void show_regs(struct pt_regs * regs)
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printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
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printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
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trap = TRAP(regs);
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trap = TRAP(regs);
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if (trap == 0x300 || trap == 0x600)
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if (trap == 0x300 || trap == 0x600)
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
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#else
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printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
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printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
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#endif
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printk("TASK = %p[%d] '%s' THREAD: %p",
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printk("TASK = %p[%d] '%s' THREAD: %p",
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current, current->pid, current->comm, task_thread_info(current));
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current, current->pid, current->comm, task_thread_info(current));
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@@ -155,7 +155,7 @@ static int early_console_initialized;
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* Called by setup_system after ppc_md->probe and ppc_md->early_init.
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* Called by setup_system after ppc_md->probe and ppc_md->early_init.
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* Call it again after setting udbg_putc in ppc_md->setup_arch.
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* Call it again after setting udbg_putc in ppc_md->setup_arch.
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*/
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*/
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void register_early_udbg_console(void)
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void __init register_early_udbg_console(void)
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{
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{
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if (early_console_initialized)
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if (early_console_initialized)
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return;
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return;
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@@ -107,7 +107,7 @@ void __init setup_pci_cmd(struct pci_controller *hose)
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}
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}
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}
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}
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static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)
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static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
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{
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{
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struct resource *res;
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struct resource *res;
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int i, res_idx = PCI_BRIDGE_RESOURCES;
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int i, res_idx = PCI_BRIDGE_RESOURCES;
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@@ -216,7 +216,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
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/* check PCI express link status */
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/* check PCI express link status */
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if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
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if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
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hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG |
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hose->indirect_type |= PPC_INDIRECT_TYPE_EXT_REG |
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PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
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PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
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if (fsl_pcie_check_link(hose))
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if (fsl_pcie_check_link(hose))
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hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
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hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
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@@ -160,4 +160,5 @@ setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data, u32
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mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
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mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
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hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK);
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hose->cfg_data = mbase + (cfg_data & ~PAGE_MASK);
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hose->ops = &indirect_pci_ops;
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hose->ops = &indirect_pci_ops;
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hose->indirect_type = flags;
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}
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}
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