Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Conflicts: drivers/firmware/iscsi_ibft.c
This commit is contained in:
David S. Miller
@@ -60,6 +60,7 @@
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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next-level-cache = <&L2C0>;
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};
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};
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@@ -146,6 +147,13 @@
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dcr-reg = <0x010 0x002>;
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};
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CRYPTO: crypto@180000 {
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compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
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reg = <4 0x00180000 0x80400>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x1d 0x4>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
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dcr-reg = <0x180 0x062>;
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@@ -274,6 +282,7 @@
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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rx-fifo-size-gige = <16384>;
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phy-mode = "sgmii";
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phy-map = <0xffffffff>;
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gpcs-address = <0x0000000a>;
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@@ -302,6 +311,7 @@
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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rx-fifo-size-gige = <16384>;
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phy-mode = "sgmii";
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phy-map = <0x00000000>;
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gpcs-address = <0x0000000b>;
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@@ -331,6 +341,8 @@
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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rx-fifo-size-gige = <16384>;
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tx-fifo-size-gige = <16384>; /* emac2&3 only */
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phy-mode = "sgmii";
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phy-map = <0x00000001>;
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gpcs-address = <0x0000000C>;
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@@ -341,6 +341,22 @@
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device_type = "open-pic";
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};
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msi@41600 {
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compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
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reg = <0x41600 0x80>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xe0 0
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0xe1 0
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0xe2 0
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0xe3 0
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0xe4 0
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0xe5 0
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0xe6 0
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0xe7 0>;
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interrupt-parent = <&mpic>;
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};
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global-utilities@e0000 {
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compatible = "fsl,mpc8641-guts";
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reg = <0xe0000 0x1000>;
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@@ -32,6 +32,7 @@
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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pci1 = &pci1;
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};
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cpus {
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@@ -338,6 +339,22 @@
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device_type = "open-pic";
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};
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msi@41600 {
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compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
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reg = <0x41600 0x80>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xe0 0
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0xe1 0
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0xe2 0
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0xe3 0
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0xe4 0
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0xe5 0
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0xe6 0
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0xe7 0>;
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interrupt-parent = <&mpic>;
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};
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global-utilities@e0000 {
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compatible = "fsl,mpc8641-guts";
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reg = <0xe0000 0x1000>;
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@@ -358,7 +375,7 @@
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clock-frequency = <33333333>;
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interrupt-parent = <&mpic>;
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interrupts = <0x18 0x2>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
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interrupt-map = <
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0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
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0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
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@@ -75,14 +75,48 @@
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interrupts = <19 2>;
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interrupt-parent = <&mpic>;
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ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
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1 0 0xe8000000 0x08000000 // Paged Flash 0
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2 0 0xe0000000 0x08000000 // Paged Flash 1
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3 0 0xfc100000 0x00020000 // NVRAM
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4 0 0xfc000000 0x00008000 // FPGA
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5 0 0xfc008000 0x00008000 // AFIX FPGA
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6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
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7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
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ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
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1 0 0xe8000000 0x08000000 // Paged Flash 0
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2 0 0xe0000000 0x08000000 // Paged Flash 1
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3 0 0xfc100000 0x00020000 // NVRAM
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4 0 0xfc000000 0x00008000 // FPGA
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5 0 0xfc008000 0x00008000 // AFIX FPGA
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6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
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7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
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/* flash@0,0 is a mirror of part of the memory in flash@1,0
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flash@0,0 {
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compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
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reg = <0x0 0x0 0x1000000>;
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bank-width = <4>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "firmware";
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reg = <0x0 0x1000000>;
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read-only;
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};
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};
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*/
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flash@1,0 {
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compatible = "gef,sbc610-paged-flash", "cfi-flash";
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reg = <0x1 0x0 0x8000000>;
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bank-width = <4>;
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device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "user";
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reg = <0x0 0x7800000>;
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};
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partition@7800000 {
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label = "firmware";
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reg = <0x7800000 0x800000>;
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read-only;
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};
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};
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nvram@3,0 {
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device_type = "nvram";
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@@ -305,6 +339,22 @@
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device_type = "open-pic";
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};
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msi@41600 {
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compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
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reg = <0x41600 0x80>;
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msi-available-ranges = <0 0x100>;
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interrupts = <
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0xe0 0
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0xe1 0
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0xe2 0
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0xe3 0
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0xe4 0
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0xe5 0
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0xe6 0
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0xe7 0>;
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interrupt-parent = <&mpic>;
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};
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global-utilities@e0000 {
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compatible = "fsl,mpc8641-guts";
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reg = <0xe0000 0x1000>;
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@@ -1,7 +1,7 @@
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/*
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* Device Tree Source for AMCC Glacier (460GT)
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*
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* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
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* Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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@@ -42,6 +42,7 @@
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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next-level-cache = <&L2C0>;
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};
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};
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@@ -106,6 +107,16 @@
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dcr-reg = <0x00c 0x002>;
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};
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L2C0: l2c {
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compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
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dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
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0x030 0x008>; /* L2 cache DCR's */
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cache-line-size = <32>; /* 32 bytes */
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cache-size = <262144>; /* L2, 256K */
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interrupt-parent = <&UIC1>;
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interrupts = <11 1>;
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};
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plb {
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compatible = "ibm,plb-460gt", "ibm,plb4";
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#address-cells = <2>;
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@@ -118,6 +129,13 @@
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dcr-reg = <0x010 0x002>;
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};
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CRYPTO: crypto@180000 {
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compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
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reg = <4 0x00180000 0x80400>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x1d 0x4>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
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dcr-reg = <0x180 0x062>;
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@@ -186,6 +204,29 @@
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reg = <0x03fa0000 0x00060000>;
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};
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};
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ndfc@3,0 {
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compatible = "ibm,ndfc";
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reg = <0x00000003 0x00000000 0x00002000>;
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ccr = <0x00001000>;
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bank-settings = <0x80002222>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand {
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x00000000 0x00100000>;
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};
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partition@100000 {
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label = "user";
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reg = <0x00000000 0x03f00000>;
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};
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};
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};
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};
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UART0: serial@ef600300 {
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@@ -237,6 +278,20 @@
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reg = <0xef600700 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x2 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@68 {
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compatible = "stm,m41t80";
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reg = <0x68>;
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interrupt-parent = <&UIC2>;
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interrupts = <0x19 0x8>;
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};
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sttm@48 {
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compatible = "ad,ad7414";
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reg = <0x48>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x14 0x8>;
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};
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};
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IIC1: i2c@ef600800 {
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@@ -275,7 +330,7 @@
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EMAC0: ethernet@ef600e00 {
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device_type = "network";
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compatible = "ibm,emac-460gt", "ibm,emac4";
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compatible = "ibm,emac-460gt", "ibm,emac4sync";
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interrupt-parent = <&EMAC0>;
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interrupts = <0x0 0x1>;
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#interrupt-cells = <1>;
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||||
@@ -283,7 +338,7 @@
|
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#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x14 0x4>;
|
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reg = <0xef600e00 0x00000074>;
|
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reg = <0xef600e00 0x000000c4>;
|
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <0>;
|
||||
@@ -305,7 +360,7 @@
|
||||
|
||||
EMAC1: ethernet@ef600f00 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460gt", "ibm,emac4";
|
||||
compatible = "ibm,emac-460gt", "ibm,emac4sync";
|
||||
interrupt-parent = <&EMAC1>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
@@ -313,7 +368,7 @@
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x15 0x4>;
|
||||
reg = <0xef600f00 0x00000074>;
|
||||
reg = <0xef600f00 0x000000c4>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <1>;
|
||||
@@ -336,7 +391,7 @@
|
||||
|
||||
EMAC2: ethernet@ef601100 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460gt", "ibm,emac4";
|
||||
compatible = "ibm,emac-460gt", "ibm,emac4sync";
|
||||
interrupt-parent = <&EMAC2>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
@@ -344,7 +399,7 @@
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x16 0x4>;
|
||||
reg = <0xef601100 0x00000074>;
|
||||
reg = <0xef601100 0x000000c4>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <2>;
|
||||
@@ -366,7 +421,7 @@
|
||||
|
||||
EMAC3: ethernet@ef601200 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-460gt", "ibm,emac4";
|
||||
compatible = "ibm,emac-460gt", "ibm,emac4sync";
|
||||
interrupt-parent = <&EMAC3>;
|
||||
interrupts = <0x0 0x1>;
|
||||
#interrupt-cells = <1>;
|
||||
@@ -374,7 +429,7 @@
|
||||
#size-cells = <0>;
|
||||
interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
|
||||
/*Wake*/ 0x1 &UIC2 0x17 0x4>;
|
||||
reg = <0xef601200 0x00000074>;
|
||||
reg = <0xef601200 0x000000c4>;
|
||||
local-mac-address = [000000000000]; /* Filled in by U-Boot */
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <3>;
|
||||
@@ -414,6 +469,7 @@
|
||||
* later cannot be changed
|
||||
*/
|
||||
ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
|
||||
0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
|
||||
0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
|
||||
|
||||
/* Inbound 2GB range starting at 0 */
|
||||
@@ -444,6 +500,7 @@
|
||||
* later cannot be changed
|
||||
*/
|
||||
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
|
||||
0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
|
||||
0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
|
||||
|
||||
/* Inbound 2GB range starting at 0 */
|
||||
@@ -485,6 +542,7 @@
|
||||
* later cannot be changed
|
||||
*/
|
||||
ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
|
||||
0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
|
||||
0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
|
||||
|
||||
/* Inbound 2GB range starting at 0 */
|
||||
|
||||
@@ -156,7 +156,7 @@
|
||||
compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
|
||||
ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
|
||||
EBC0: ebc {
|
||||
@@ -165,14 +165,47 @@
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
/* ranges property is supplied by U-Boot */
|
||||
interrupts = <0x5 0x1>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
|
||||
nor_flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
bank-width = <2>;
|
||||
reg = <0x00000000 0x00000000 0x01000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x00000000 0x001e0000>;
|
||||
};
|
||||
partition@1e0000 {
|
||||
label = "dtb";
|
||||
reg = <0x001e0000 0x00020000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "root";
|
||||
reg = <0x00200000 0x00200000>;
|
||||
};
|
||||
partition@400000 {
|
||||
label = "user";
|
||||
reg = <0x00400000 0x00b60000>;
|
||||
};
|
||||
partition@f60000 {
|
||||
label = "env";
|
||||
reg = <0x00f60000 0x00040000>;
|
||||
};
|
||||
partition@fa0000 {
|
||||
label = "u-boot";
|
||||
reg = <0x00fa0000 0x00060000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@10000200 {
|
||||
UART0: serial@f0000200 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x10000200 0x00000008>;
|
||||
reg = <0xf0000200 0x00000008>;
|
||||
virtual-reg = <0xa0000200>;
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
current-speed = <115200>;
|
||||
@@ -180,10 +213,10 @@
|
||||
interrupts = <0x0 0x4>;
|
||||
};
|
||||
|
||||
UART1: serial@10000300 {
|
||||
UART1: serial@f0000300 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x10000300 0x00000008>;
|
||||
reg = <0xf0000300 0x00000008>;
|
||||
virtual-reg = <0xa0000300>;
|
||||
clock-frequency = <0>;
|
||||
current-speed = <0>;
|
||||
@@ -192,10 +225,10 @@
|
||||
};
|
||||
|
||||
|
||||
UART2: serial@10000600 {
|
||||
UART2: serial@f0000600 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x10000600 0x00000008>;
|
||||
reg = <0xf0000600 0x00000008>;
|
||||
virtual-reg = <0xa0000600>;
|
||||
clock-frequency = <0>;
|
||||
current-speed = <0>;
|
||||
@@ -203,27 +236,27 @@
|
||||
interrupts = <0x5 0x4>;
|
||||
};
|
||||
|
||||
IIC0: i2c@10000400 {
|
||||
IIC0: i2c@f0000400 {
|
||||
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
|
||||
reg = <0x10000400 0x00000014>;
|
||||
reg = <0xf0000400 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x2 0x4>;
|
||||
};
|
||||
|
||||
IIC1: i2c@10000500 {
|
||||
IIC1: i2c@f0000500 {
|
||||
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
|
||||
reg = <0x10000500 0x00000014>;
|
||||
reg = <0xf0000500 0x00000014>;
|
||||
interrupt-parent = <&UIC0>;
|
||||
interrupts = <0x3 0x4>;
|
||||
};
|
||||
|
||||
EMAC0: ethernet@10000800 {
|
||||
EMAC0: ethernet@f0000800 {
|
||||
linux,network-index = <0x0>;
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-440spe", "ibm,emac4";
|
||||
interrupt-parent = <&UIC1>;
|
||||
interrupts = <0x1c 0x4 0x1d 0x4>;
|
||||
reg = <0x10000800 0x00000074>;
|
||||
reg = <0xf0000800 0x00000074>;
|
||||
local-mac-address = [000000000000];
|
||||
mal-device = <&MAL0>;
|
||||
mal-tx-channel = <0>;
|
||||
@@ -248,11 +281,11 @@
|
||||
primary;
|
||||
large-inbound-windows;
|
||||
enable-msi-hole;
|
||||
reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
|
||||
0x00000000 0x00000000 0x00000000 /* no IACK cycles */
|
||||
0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
|
||||
0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
|
||||
0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
|
||||
reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
|
||||
0x00000000 0x00000000 0x00000000 /* no IACK cycles */
|
||||
0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
|
||||
0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
|
||||
0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
|
||||
|
||||
/* Outbound ranges, one memory and one IO,
|
||||
* later cannot be changed
|
||||
@@ -453,6 +486,6 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = "/plb/opb/serial@10000200";
|
||||
linux,stdout-path = "/plb/opb/serial@f0000200";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -62,17 +62,12 @@
|
||||
interrupt-parent = < &ipic >;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
bank-width = <1>;
|
||||
// ADS has two Hynix 512MB Nand flash chips in a single
|
||||
// stacked package .
|
||||
// stacked package.
|
||||
chips = <2>;
|
||||
nand0@0 {
|
||||
label = "nand0";
|
||||
reg = <0x00000000 0x02000000>; // first 32 MB of chip 0
|
||||
};
|
||||
nand1@20000000 {
|
||||
label = "nand1";
|
||||
reg = <0x20000000 0x02000000>; // first 32 MB of chip 1
|
||||
nand@0 {
|
||||
label = "nand";
|
||||
reg = <0x00000000 0x40000000>; // 512MB + 512MB
|
||||
};
|
||||
};
|
||||
|
||||
@@ -166,6 +161,11 @@
|
||||
interrupt-parent = < &ipic >;
|
||||
};
|
||||
|
||||
reset@e00 { // Reset module
|
||||
compatible = "fsl,mpc5121-reset";
|
||||
reg = <0xe00 0x100>;
|
||||
};
|
||||
|
||||
clock@f00 { // Clock control
|
||||
compatible = "fsl,mpc5121-clock";
|
||||
reg = <0xf00 0x100>;
|
||||
@@ -185,17 +185,15 @@
|
||||
interrupt-parent = < &ipic >;
|
||||
};
|
||||
|
||||
mscan@1300 {
|
||||
can@1300 {
|
||||
compatible = "fsl,mpc5121-mscan";
|
||||
cell-index = <0>;
|
||||
interrupts = <12 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
reg = <0x1300 0x80>;
|
||||
};
|
||||
|
||||
mscan@1380 {
|
||||
can@1380 {
|
||||
compatible = "fsl,mpc5121-mscan";
|
||||
cell-index = <1>;
|
||||
interrupts = <13 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
reg = <0x1380 0x80>;
|
||||
@@ -205,17 +203,31 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
|
||||
cell-index = <0>;
|
||||
reg = <0x1700 0x20>;
|
||||
interrupts = <9 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
fsl,preserve-clocking;
|
||||
|
||||
hwmon@4a {
|
||||
compatible = "adi,ad7414";
|
||||
reg = <0x4a>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "at,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "stm,m41t62";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@1720 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
|
||||
cell-index = <1>;
|
||||
reg = <0x1720 0x20>;
|
||||
interrupts = <10 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
@@ -225,7 +237,6 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
|
||||
cell-index = <2>;
|
||||
reg = <0x1740 0x20>;
|
||||
interrupts = <11 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
@@ -244,7 +255,7 @@
|
||||
};
|
||||
|
||||
display@2100 {
|
||||
compatible = "fsl,mpc5121-diu", "fsl-diu";
|
||||
compatible = "fsl,mpc5121-diu";
|
||||
reg = <0x2100 0x100>;
|
||||
interrupts = <64 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
@@ -277,7 +288,7 @@
|
||||
|
||||
// USB1 using external ULPI PHY
|
||||
//usb@3000 {
|
||||
// compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
|
||||
// compatible = "fsl,mpc5121-usb2-dr";
|
||||
// reg = <0x3000 0x1000>;
|
||||
// #address-cells = <1>;
|
||||
// #size-cells = <0>;
|
||||
@@ -285,12 +296,11 @@
|
||||
// interrupts = <43 0x8>;
|
||||
// dr_mode = "otg";
|
||||
// phy_type = "ulpi";
|
||||
// port1;
|
||||
//};
|
||||
|
||||
// USB0 using internal UTMI PHY
|
||||
usb@4000 {
|
||||
compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
|
||||
compatible = "fsl,mpc5121-usb2-dr";
|
||||
reg = <0x4000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@@ -298,7 +308,8 @@
|
||||
interrupts = <44 0x8>;
|
||||
dr_mode = "otg";
|
||||
phy_type = "utmi_wide";
|
||||
port0;
|
||||
fsl,invert-drvvbus;
|
||||
fsl,invert-pwr-fault;
|
||||
};
|
||||
|
||||
// IO control
|
||||
@@ -365,7 +376,7 @@
|
||||
};
|
||||
|
||||
dma@14000 {
|
||||
compatible = "fsl,mpc5121-dma2";
|
||||
compatible = "fsl,mpc5121-dma";
|
||||
reg = <0x14000 0x1800>;
|
||||
interrupts = <65 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
|
||||
@@ -54,9 +54,52 @@
|
||||
reg = <0x0 0x10000000>;
|
||||
};
|
||||
|
||||
bcsr@f8000000 {
|
||||
compatible = "fsl,mpc8568mds-bcsr";
|
||||
reg = <0xf8000000 0x8000>;
|
||||
localbus@e0005000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus",
|
||||
"simple-bus";
|
||||
reg = <0xe0005000 0x1000>;
|
||||
|
||||
ranges = <0x0 0x0 0xfe000000 0x02000000
|
||||
0x1 0x0 0xf8000000 0x00008000
|
||||
0x2 0x0 0xf0000000 0x04000000
|
||||
0x4 0x0 0xf8008000 0x00008000
|
||||
0x5 0x0 0xf8010000 0x00008000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x02000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
};
|
||||
|
||||
bcsr@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8568mds-bcsr";
|
||||
reg = <1 0 0x8000>;
|
||||
ranges = <0 1 0 0x8000>;
|
||||
|
||||
bcsr5: gpio-controller@11 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "fsl,mpc8568mds-bcsr-gpio";
|
||||
reg = <0x5 0x1>;
|
||||
gpio-controller;
|
||||
};
|
||||
};
|
||||
|
||||
pib@4,0 {
|
||||
compatible = "fsl,mpc8568mds-pib";
|
||||
reg = <4 0 0x8000>;
|
||||
};
|
||||
|
||||
pib@5,0 {
|
||||
compatible = "fsl,mpc8568mds-pib";
|
||||
reg = <5 0 0x8000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc8568@e0000000 {
|
||||
@@ -610,4 +653,20 @@
|
||||
sleep = <&pmc 0x00080000 /* controller */
|
||||
&pmc 0x00040000>; /* message unit */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
green {
|
||||
gpios = <&bcsr5 1 0>;
|
||||
};
|
||||
|
||||
amber {
|
||||
gpios = <&bcsr5 2 0>;
|
||||
};
|
||||
|
||||
red {
|
||||
gpios = <&bcsr5 3 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user