i.MX fixes for 5.2:

- A build fix for soc-imx8 driver which needs SOC_BUS support.  To
    avoid dealing with the dependency for every single i.MX SoC bus
    driver, we selects at from architecture level.
  - A fix on i.MX SCU firmware driver to ensure SCU irq is enabled only
    after IPC is ready.
  - A regression fix on cpuidle-imx6sx driver, which causes some
    characters loss on serial communication.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJc50FAAAoJEFBXWFqHsHzOt4wIAJJ4MLXCMKj2oVWXimkF3DAF
 g9M7ridrarhPAXowuTYV4FuW7me7nPxr5VTmwVIJE23wEKdaOd7cg0tkmvMi0tG6
 3TlNwCsEjJx+9rtGF196SZfR9HinLziAc4x7Qcl88xlQTQEIptvx6AMPit7Gy0je
 MJ0PzLA1l+tazo7dXvMjZ+LkxlvLTSB/RuBciA8sgOvwsdbG1Azz/AduSLxO7e/T
 ZSmEElTluqIKVxH5sbVY0T7mxWat7l5As28nx27cWDHGPoDMOt/TWiCTAvFR0d6T
 m+bW6xcvy63Z2II1Er//ig4rwcmK1mcUv+3i63/sIkFxl9fa0H4WnTu67T+/mck=
 =zbC7
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

i.MX fixes for 5.2:
 - A build fix for soc-imx8 driver which needs SOC_BUS support.  To
   avoid dealing with the dependency for every single i.MX SoC bus
   driver, we selects at from architecture level.
 - A fix on i.MX SCU firmware driver to ensure SCU irq is enabled only
   after IPC is ready.
 - A regression fix on cpuidle-imx6sx driver, which causes some
   characters loss on serial communication.

* tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: cpuidle-imx6sx: Restrict the SW2ISO increase to i.MX6SX
  firmware: imx: SCU irq should ONLY be enabled after SCU IPC is ready
  arm64: imx: Fix build error without CONFIG_SOC_BUS

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-16 13:26:55 -07:00
commit 4bded29983
3 changed files with 6 additions and 1 deletions

View File

@ -15,6 +15,7 @@
#include "common.h"
#include "cpuidle.h"
#include "hardware.h"
static int imx6sx_idle_finish(unsigned long val)
{
@ -110,7 +111,7 @@ int __init imx6sx_cpuidle_init(void)
* except for power up sw2iso which need to be
* larger than LDO ramp up time.
*/
imx_gpc_set_arm_power_up_timing(0xf, 1);
imx_gpc_set_arm_power_up_timing(cpu_is_imx6sx() ? 0xf : 0x2, 1);
imx_gpc_set_arm_power_down_timing(1, 1);
return cpuidle_register(&imx6sx_cpuidle_driver, NULL);

View File

@ -168,6 +168,7 @@ config ARCH_MXC
select IMX_GPCV2_PM_DOMAINS
select PM
select PM_GENERIC_DOMAINS
select SOC_BUS
help
This enables support for the ARMv8 based SoCs in the
NXP i.MX family.

View File

@ -100,6 +100,9 @@ int imx_scu_irq_group_enable(u8 group, u32 mask, u8 enable)
struct imx_sc_rpc_msg *hdr = &msg.hdr;
int ret;
if (!imx_sc_irq_ipc_handle)
return -EPROBE_DEFER;
hdr->ver = IMX_SC_RPC_VERSION;
hdr->svc = IMX_SC_RPC_SVC_IRQ;
hdr->func = IMX_SC_IRQ_FUNC_ENABLE;