OMAP: clockdomain: Arch specific funcs for clkdm_clk_enable/disable
Define the following architecture specific funtions for omap2/3/4 .clkdm_clk_enable .clkdm_clk_disable Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_k_enable as clkdm_clk_enable and omap2_clkdm_clk_disable as clkdm_clk_disable.a Remove unused functions (_enable/_disable_hwsup) and unsed headers from clockdomain.c file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Rajendra Nayak
committed by
Paul Walmsley
Paul Walmsley
parent
5cd1937b6d
commit
4da71ae607
@ -26,17 +26,8 @@
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#include <linux/bitops.h>
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#include "prm2xxx_3xxx.h"
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#include "prm-regbits-24xx.h"
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#include "cm2xxx_3xxx.h"
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#include "cm-regbits-24xx.h"
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#include "cminst44xx.h"
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#include "prcm44xx.h"
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#include <plat/clock.h>
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include <plat/prcm.h>
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/* clkdm_list contains all registered struct clockdomains */
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static LIST_HEAD(clkdm_list);
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@ -235,58 +226,6 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm)
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}
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}
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/**
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* _enable_hwsup - place a clockdomain into hardware-supervised idle
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* @clkdm: struct clockdomain *
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*
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* Place the clockdomain into hardware-supervised idle mode. No return
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* value.
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*
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* XXX Should this return an error if the clockdomain does not support
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* hardware-supervised idle mode?
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*/
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static void _enable_hwsup(struct clockdomain *clkdm)
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{
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if (cpu_is_omap24xx())
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omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
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clkdm->clktrctrl_mask);
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else if (cpu_is_omap34xx())
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omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
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clkdm->clktrctrl_mask);
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else if (cpu_is_omap44xx())
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return omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst,
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clkdm->clkdm_offs);
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else
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BUG();
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}
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/**
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* _disable_hwsup - place a clockdomain into software-supervised idle
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* @clkdm: struct clockdomain *
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*
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* Place the clockdomain @clkdm into software-supervised idle mode.
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* No return value.
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*
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* XXX Should this return an error if the clockdomain does not support
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* software-supervised idle mode?
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*/
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static void _disable_hwsup(struct clockdomain *clkdm)
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{
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if (cpu_is_omap24xx())
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omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
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clkdm->clktrctrl_mask);
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else if (cpu_is_omap34xx())
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omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
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clkdm->clktrctrl_mask);
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else if (cpu_is_omap44xx())
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return omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst,
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clkdm->clkdm_offs);
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else
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BUG();
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}
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/**
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* _resolve_clkdm_deps() - resolve clkdm_names in @clkdm_deps to clkdms
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* @clkdm: clockdomain that we are resolving dependencies for
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@ -884,7 +823,7 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
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/* Clockdomain-to-clock framework interface code */
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/**
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* omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm
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* clkdm_clk_enable - add an enabled downstream clock to this clkdm
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* @clkdm: struct clockdomain *
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* @clk: struct clk * of the enabled downstream clock
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*
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@ -897,10 +836,8 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
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* by on-chip processors. Returns -EINVAL if passed null pointers;
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* returns 0 upon success or if the clockdomain is in hwsup idle mode.
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*/
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int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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{
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bool hwsup = false;
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/*
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* XXX Rewrite this code to maintain a list of enabled
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* downstream clocks for debugging purposes?
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@ -909,6 +846,9 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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if (!clkdm || !clk)
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return -EINVAL;
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if (!arch_clkdm || !arch_clkdm->clkdm_clk_enable)
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return -EINVAL;
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if (atomic_inc_return(&clkdm->usecount) > 1)
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return 0;
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@ -917,31 +857,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name,
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clk->name);
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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if (!clkdm->clktrctrl_mask)
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return 0;
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hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
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clkdm->clktrctrl_mask);
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} else if (cpu_is_omap44xx()) {
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hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst,
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clkdm->clkdm_offs);
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}
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if (hwsup) {
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/* Disable HW transitions when we are changing deps */
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_disable_hwsup(clkdm);
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_clkdm_add_autodeps(clkdm);
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_enable_hwsup(clkdm);
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} else {
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clkdm_wakeup(clkdm);
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}
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arch_clkdm->clkdm_clk_enable(clkdm);
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pwrdm_wait_transition(clkdm->pwrdm.ptr);
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pwrdm_clkdm_state_switch(clkdm);
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@ -949,7 +865,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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}
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/**
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* omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm
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* clkdm_clk_disable - remove an enabled downstream clock from this clkdm
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* @clkdm: struct clockdomain *
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* @clk: struct clk * of the disabled downstream clock
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*
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@ -962,10 +878,8 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
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* is enabled; or returns 0 upon success or if the clockdomain is in
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* hwsup idle mode.
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*/
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int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
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int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
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{
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bool hwsup = false;
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/*
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* XXX Rewrite this code to maintain a list of enabled
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* downstream clocks for debugging purposes?
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@ -974,6 +888,9 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
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if (!clkdm || !clk)
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return -EINVAL;
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if (!arch_clkdm || !arch_clkdm->clkdm_clk_disable)
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return -EINVAL;
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#ifdef DEBUG
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if (atomic_read(&clkdm->usecount) == 0) {
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WARN_ON(1); /* underflow */
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@ -989,31 +906,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
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pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name,
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clk->name);
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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if (!clkdm->clktrctrl_mask)
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return 0;
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hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
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clkdm->clktrctrl_mask);
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} else if (cpu_is_omap44xx()) {
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hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst,
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clkdm->clkdm_offs);
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}
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if (hwsup) {
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/* Disable HW transitions when we are changing deps */
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_disable_hwsup(clkdm);
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_clkdm_del_autodeps(clkdm);
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_enable_hwsup(clkdm);
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} else {
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clkdm_sleep(clkdm);
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}
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arch_clkdm->clkdm_clk_disable(clkdm);
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pwrdm_clkdm_state_switch(clkdm);
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return 0;
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