[SPARC64]: More fully work around Spitfire Errata 51.
It appears that a memory barrier soon after a mispredicted branch, not just in the delay slot, can cause the hang condition of this cpu errata. So move them out-of-line, and explicitly put them into a "branch always, predict taken" delay slot which should fully kill this problem. Signed-off-by: David S. Miller <davem@davemloft.net>
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@@ -877,11 +877,12 @@ static void new_setup_frame32(struct k_sigaction *ka, struct pt_regs *regs,
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unsigned long page = (unsigned long)
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page_address(pte_page(*ptep));
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__asm__ __volatile__(
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" membar #StoreStore\n"
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" flush %0 + %1"
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: : "r" (page), "r" (address & (PAGE_SIZE - 1))
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: "memory");
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wmb();
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__asm__ __volatile__("flush %0 + %1"
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: /* no outputs */
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: "r" (page),
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"r" (address & (PAGE_SIZE - 1))
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: "memory");
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}
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pte_unmap(ptep);
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preempt_enable();
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@@ -1292,11 +1293,12 @@ static void setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs,
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unsigned long page = (unsigned long)
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page_address(pte_page(*ptep));
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__asm__ __volatile__(
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" membar #StoreStore\n"
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" flush %0 + %1"
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: : "r" (page), "r" (address & (PAGE_SIZE - 1))
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: "memory");
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wmb();
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__asm__ __volatile__("flush %0 + %1"
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: /* no outputs */
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: "r" (page),
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"r" (address & (PAGE_SIZE - 1))
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: "memory");
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}
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pte_unmap(ptep);
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preempt_enable();
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