ssb: move parallel flash config into an own struct
This is a preparing step for adding serial flash support. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
committed by
John W. Linville
parent
e5c9d7c075
commit
54c974984e
@@ -43,8 +43,8 @@ static void early_nvram_init(void)
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#ifdef CONFIG_BCM47XX_SSB
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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case BCM47XX_BUS_TYPE_SSB:
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mcore_ssb = &bcm47xx_bus.ssb.mipscore;
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mcore_ssb = &bcm47xx_bus.ssb.mipscore;
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base = mcore_ssb->flash_window;
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base = mcore_ssb->pflash.window;
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lim = mcore_ssb->flash_window_size;
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lim = mcore_ssb->pflash.window_size;
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break;
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break;
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#endif
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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#ifdef CONFIG_BCM47XX_BCMA
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@@ -156,10 +156,10 @@ static int __init wgt634u_init(void)
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SSB_CHIPCO_IRQ_GPIO);
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SSB_CHIPCO_IRQ_GPIO);
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}
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}
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wgt634u_flash_data.width = mcore->flash_buswidth;
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wgt634u_flash_data.width = mcore->pflash.buswidth;
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wgt634u_flash_resource.start = mcore->flash_window;
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wgt634u_flash_resource.start = mcore->pflash.window;
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wgt634u_flash_resource.end = mcore->flash_window
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wgt634u_flash_resource.end = mcore->pflash.window
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+ mcore->flash_window_size
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+ mcore->pflash.window_size
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- 1;
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- 1;
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return platform_add_devices(wgt634u_devices,
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return platform_add_devices(wgt634u_devices,
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ARRAY_SIZE(wgt634u_devices));
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ARRAY_SIZE(wgt634u_devices));
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@@ -192,9 +192,9 @@ static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
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/* When there is no chipcommon on the bus there is 4MB flash */
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/* When there is no chipcommon on the bus there is 4MB flash */
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if (!bus->chipco.dev) {
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if (!bus->chipco.dev) {
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mcore->flash_buswidth = 2;
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mcore->pflash.buswidth = 2;
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mcore->flash_window = SSB_FLASH1;
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mcore->pflash.window = SSB_FLASH1;
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mcore->flash_window_size = SSB_FLASH1_SZ;
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mcore->pflash.window_size = SSB_FLASH1_SZ;
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return;
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return;
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}
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}
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@@ -206,13 +206,13 @@ static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
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break;
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break;
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case SSB_CHIPCO_FLASHT_PARA:
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case SSB_CHIPCO_FLASHT_PARA:
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pr_debug("Found parallel flash\n");
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pr_debug("Found parallel flash\n");
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mcore->flash_window = SSB_FLASH2;
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mcore->pflash.window = SSB_FLASH2;
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mcore->flash_window_size = SSB_FLASH2_SZ;
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mcore->pflash.window_size = SSB_FLASH2_SZ;
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if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
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if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
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& SSB_CHIPCO_CFG_DS16) == 0)
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& SSB_CHIPCO_CFG_DS16) == 0)
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mcore->flash_buswidth = 1;
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mcore->pflash.buswidth = 1;
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else
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else
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mcore->flash_buswidth = 2;
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mcore->pflash.buswidth = 2;
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break;
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break;
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}
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}
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}
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}
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@@ -13,6 +13,11 @@ struct ssb_serial_port {
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unsigned int reg_shift;
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unsigned int reg_shift;
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};
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};
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struct ssb_pflash {
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u8 buswidth;
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u32 window;
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u32 window_size;
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};
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struct ssb_mipscore {
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struct ssb_mipscore {
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struct ssb_device *dev;
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struct ssb_device *dev;
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@@ -20,9 +25,7 @@ struct ssb_mipscore {
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int nr_serial_ports;
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int nr_serial_ports;
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struct ssb_serial_port serial_ports[4];
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struct ssb_serial_port serial_ports[4];
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u8 flash_buswidth;
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struct ssb_pflash pflash;
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u32 flash_window;
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u32 flash_window_size;
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};
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};
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extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
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extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
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