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sky2: advanced error reporting

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Use the kernel interfaces for advanced error reporting.
This should be cleaner and clear up errors on boot.

For those systems with busted BIOS's that don't correctly
support mmconfig, advanced error reporting will be disabled.
The PCI registers for advanced error reporting start at 0x100 which
is too large to be accessed by legacy functions.

Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Stephen Hemminger
2007-08-29 12:58:14 -07:00
committed by David S. Miller
parent 8c4c00f371
commit 555382cbfc
2 changed files with 27 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

41
drivers/net/sky2.h
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@@ -18,14 +18,6 @@ enum {
PCI_CFG_REG_1 = 0x94,
};
enum {
PEX_DEV_CAP = 0xe4,
PEX_DEV_CTRL = 0xe8,
PEX_DEV_STA = 0xea,
PEX_LNK_STAT = 0xf2,
PEX_UNC_ERR_STAT= 0x104,
};
/* Yukon-2 */
enum pci_dev_reg_1 {
PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
@@ -151,38 +143,6 @@ enum pci_cfg_reg1 {
PCI_STATUS_REC_TARGET_ABORT | \
PCI_STATUS_PARITY)
enum pex_dev_ctrl {
PEX_DC_MAX_RRS_MSK = 7<<12, /* Bit 14..12: Max. Read Request Size */
PEX_DC_EN_NO_SNOOP = 1<<11,/* Enable No Snoop */
PEX_DC_EN_AUX_POW = 1<<10,/* Enable AUX Power */
PEX_DC_EN_PHANTOM = 1<<9, /* Enable Phantom Functions */
PEX_DC_EN_EXT_TAG = 1<<8, /* Enable Extended Tag Field */
PEX_DC_MAX_PLS_MSK = 7<<5, /* Bit 7.. 5: Max. Payload Size Mask */
PEX_DC_EN_REL_ORD = 1<<4, /* Enable Relaxed Ordering */
PEX_DC_EN_UNS_RQ_RP = 1<<3, /* Enable Unsupported Request Reporting */
PEX_DC_EN_FAT_ER_RP = 1<<2, /* Enable Fatal Error Reporting */
PEX_DC_EN_NFA_ER_RP = 1<<1, /* Enable Non-Fatal Error Reporting */
PEX_DC_EN_COR_ER_RP = 1<<0, /* Enable Correctable Error Reporting */
};
#define PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK)
/* PEX_UNC_ERR_STAT PEX Uncorrectable Errors Status Register (Yukon-2) */
enum pex_err {
PEX_UNSUP_REQ = 1<<20, /* Unsupported Request Error */
PEX_MALFOR_TLP = 1<<18, /* Malformed TLP */
PEX_UNEXP_COMP = 1<<16, /* Unexpected Completion */
PEX_COMP_TO = 1<<14, /* Completion Timeout */
PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */
PEX_POIS_TLP = 1<<12, /* Poisoned TLP */
PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */
PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P),
};
enum csr_regs {
B0_RAP = 0x0000,
B0_CTST = 0x0004,
@@ -419,7 +379,6 @@ enum {
Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2,
Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT |
Y2_IS_PCI_EXP |
Y2_HWE_L1_MASK | Y2_HWE_L2_MASK,
};