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Use an irq_enable_hazard hazard barrier in unmask_mips_irq. This

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hasn't been an actual bug, so it's more a change to be 100% compliant
with the requirements of the architecture spec.  Similar fix to
mask_mips_irq where there was a slightly less theoretical chance of
getting hit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2005-07-13 18:20:33 +00:00
parent 97fb5de194
commit 569f75bd02
1 changed files with 2 additions and 0 deletions
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2
arch/mips/kernel/irq_cpu.c
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@@ -40,11 +40,13 @@ static int mips_cpu_irq_base;
static inline void unmask_mips_irq(unsigned int irq) static inline void unmask_mips_irq(unsigned int irq)
{ {
set_c0_status(0x100 << (irq - mips_cpu_irq_base)); set_c0_status(0x100 << (irq - mips_cpu_irq_base));
irq_enable_hazard();
} }
static inline void mask_mips_irq(unsigned int irq) static inline void mask_mips_irq(unsigned int irq)
{ {
clear_c0_status(0x100 << (irq - mips_cpu_irq_base)); clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
irq_disable_hazard();
} }
static inline void mips_cpu_irq_enable(unsigned int irq) static inline void mips_cpu_irq_enable(unsigned int irq)