ath5k: Fixes for PCI-E cards
* Fix nic_wakeup for PCI-E chips (don't set AR5K_RESET_CTL_PCI bit) * Fix dma size setting for PCI-E chips (thanx to Bob Copeland). Changes-licensed-under: ISC Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: Luis R. Rodriguez <mcgrof@winlab.rutgers.edu> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
committed by
John W. Linville
parent
74693a7f30
commit
56c9054f16
@@ -171,13 +171,13 @@ struct ath5k_srev_name {
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#define AR5K_SREV_VER_AR5213A 0x59
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#define AR5K_SREV_VER_AR5213A 0x59
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#define AR5K_SREV_VER_AR2413 0x78
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#define AR5K_SREV_VER_AR2413 0x78
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#define AR5K_SREV_VER_AR2414 0x79
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#define AR5K_SREV_VER_AR2414 0x79
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#define AR5K_SREV_VER_AR2424 0xa0
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#define AR5K_SREV_VER_AR2424 0xa0 /* PCI-E */
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#define AR5K_SREV_VER_AR5424 0xa3
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#define AR5K_SREV_VER_AR5424 0xa3 /* PCI-E */
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#define AR5K_SREV_VER_AR5413 0xa4
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#define AR5K_SREV_VER_AR5413 0xa4
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#define AR5K_SREV_VER_AR5414 0xa5
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#define AR5K_SREV_VER_AR5414 0xa5
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#define AR5K_SREV_VER_AR5416 0xc0 /* ? */
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#define AR5K_SREV_VER_AR5416 0xc0 /* PCI-E */
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#define AR5K_SREV_VER_AR5418 0xca
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#define AR5K_SREV_VER_AR5418 0xca /* PCI-E */
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#define AR5K_SREV_VER_AR2425 0xe2
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#define AR5K_SREV_VER_AR2425 0xe2 /* PCI-E */
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#define AR5K_SREV_RAD_5110 0x00
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#define AR5K_SREV_RAD_5110 0x00
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#define AR5K_SREV_RAD_5111 0x10
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#define AR5K_SREV_RAD_5111 0x10
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@@ -300,7 +300,8 @@ err:
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*/
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*/
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static int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
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static int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
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{
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{
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u32 turbo, mode, clock;
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struct pci_dev *pdev = ah->ah_sc->pdev;
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u32 turbo, mode, clock, bus_flags;
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int ret;
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int ret;
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turbo = 0;
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turbo = 0;
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@@ -377,9 +378,15 @@ static int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
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AR5K_PHY_TURBO);
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AR5K_PHY_TURBO);
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}
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}
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/* ...reset chipset and PCI device */
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/* reseting PCI on PCI-E cards results card to hang
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if (ah->ah_single_chip == false && ath5k_hw_nic_reset(ah,
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* and always return 0xffff... so we ingore that flag
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AR5K_RESET_CTL_CHIP | AR5K_RESET_CTL_PCI)) {
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* for PCI-E cards */
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bus_flags = (pdev->is_pcie) ? 0 : AR5K_RESET_CTL_PCI;
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/* Reset chipset */
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ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU |
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AR5K_RESET_CTL_BASEBAND | bus_flags);
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if (ret) {
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ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip + PCI\n");
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ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip + PCI\n");
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return -EIO;
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return -EIO;
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}
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}
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@@ -588,7 +595,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
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struct ieee80211_channel *channel, bool change_channel)
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struct ieee80211_channel *channel, bool change_channel)
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{
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{
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
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u32 data, s_seq, s_ant, s_led[3];
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struct pci_dev *pdev = ah->ah_sc->pdev;
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u32 data, s_seq, s_ant, s_led[3], dma_size;
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unsigned int i, mode, freq, ee_mode, ant[2];
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unsigned int i, mode, freq, ee_mode, ant[2];
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int ret;
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int ret;
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@@ -900,13 +908,24 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
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/*
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/*
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* Set Rx/Tx DMA Configuration
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* Set Rx/Tx DMA Configuration
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*(passing dma size not available on 5210)
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*
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* Set maximum DMA size (512) except for PCI-E cards since
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* it causes rx overruns and tx errors (tested on 5424 but since
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* rx overruns also occur on 5416/5418 with madwifi we set 128
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* for all PCI-E cards to be safe).
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*
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* In dumps this is 128 for allchips.
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*
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* XXX: need to check 5210 for this
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* TODO: Check out tx triger level, it's always 64 on dumps but I
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* guess we can tweak it and see how it goes ;-)
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*/
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*/
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dma_size = (pdev->is_pcie) ? AR5K_DMASIZE_128B : AR5K_DMASIZE_512B;
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if (ah->ah_version != AR5K_AR5210) {
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if (ah->ah_version != AR5K_AR5210) {
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AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG, AR5K_TXCFG_SDMAMR,
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AR5K_REG_WRITE_BITS(ah, AR5K_TXCFG,
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AR5K_DMASIZE_512B | AR5K_TXCFG_DMASIZE);
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AR5K_TXCFG_SDMAMR, dma_size);
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AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG, AR5K_RXCFG_SDMAMW,
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AR5K_REG_WRITE_BITS(ah, AR5K_RXCFG,
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AR5K_DMASIZE_512B);
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AR5K_RXCFG_SDMAMW, dma_size);
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}
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}
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/*
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/*
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