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ARM: dove: unify clock setup

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This patch synchronizes the clock setup of dove with other orion-based
platforms.

In dove_find_tclk there was a note about DOVE_SAMPLE_HI/LO register to
detect tclk. While it might be possible to set a different tclk frequency
with reset strapping the Dove datasheets don't tell anything about tclk
frequency here. Therefore, I removed that comment.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Sebastian Hesselbarth 2012-08-15 19:07:30 +02:00 committed by Jason Cooper
parent 0510c8a014
commit 5817d10b8b
1 changed files with 9 additions and 10 deletions
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19
arch/arm/mach-dove/common.c
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@ -33,8 +33,6 @@
#include <plat/addr-map.h> #include <plat/addr-map.h>
#include "common.h" #include "common.h"
static int get_tclk(void);
/***************************************************************************** /*****************************************************************************
* I/O Address Mapping * I/O Address Mapping
****************************************************************************/ ****************************************************************************/
@ -70,12 +68,13 @@ void __init dove_map_io(void)
/***************************************************************************** /*****************************************************************************
* CLK tree * CLK tree
****************************************************************************/ ****************************************************************************/
static int dove_tclk;
static struct clk *tclk; static struct clk *tclk;
static void __init clk_init(void) static void __init dove_clk_init(void)
{ {
tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
get_tclk()); dove_tclk);
orion_clkdev_init(tclk); orion_clkdev_init(tclk);
} }
@ -188,16 +187,16 @@ void __init dove_init_early(void)
orion_time_set_base(TIMER_VIRT_BASE); orion_time_set_base(TIMER_VIRT_BASE);
} }
static int get_tclk(void) static int __init dove_find_tclk(void)
{ {
/* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
return 166666667; return 166666667;
} }
static void __init dove_timer_init(void) static void __init dove_timer_init(void)
{ {
dove_tclk = dove_find_tclk();
orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
IRQ_DOVE_BRIDGE, get_tclk()); IRQ_DOVE_BRIDGE, dove_tclk);
} }
struct sys_timer dove_timer = { struct sys_timer dove_timer = {
@ -285,8 +284,8 @@ void __init dove_sdio1_init(void)
void __init dove_init(void) void __init dove_init(void)
{ {
printk(KERN_INFO "Dove 88AP510 SoC, "); pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000); (dove_tclk + 499999) / 1000000);
#ifdef CONFIG_CACHE_TAUROS2 #ifdef CONFIG_CACHE_TAUROS2
tauros2_init(); tauros2_init();
@ -294,7 +293,7 @@ void __init dove_init(void)
dove_setup_cpu_mbus(); dove_setup_cpu_mbus();
/* Setup root of clk tree */ /* Setup root of clk tree */
clk_init(); dove_clk_init();
/* internal devices that every board has */ /* internal devices that every board has */
dove_rtc_init(); dove_rtc_init();