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[POWERPC] Remove set_cfg_type for PCI indirect users that don't need it

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The Freescale and Marvell PCI controllers dont require explicit setting for
type 1 config cycles.  They handle producing them by implicitly looking at the
bus, devfn.

The TSI108 and 52xx don't use the generic PCI indirect code and thus don't
bother with set_cfg_type.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2007-06-21 11:22:47 -05:00
parent d3c7ffabf0
commit 5ab9c4524d
7 changed files with 0 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/powerpc/platforms/52xx/mpc52xx_pci.c
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@@ -390,7 +390,6 @@ mpc52xx_add_bridge(struct device_node *node)
return -ENOMEM; return -ENOMEM;
hose->arch_data = node; hose->arch_data = node;
hose->set_cfg_type = 1;
hose->first_busno = bus_range ? bus_range[0] : 0; hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->last_busno = bus_range ? bus_range[1] : 0xff;

3
arch/powerpc/platforms/82xx/mpc82xx_ads.c
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@@ -548,14 +548,11 @@ static void __init mpc82xx_add_bridge(struct device_node *np)
return; return;
hose->arch_data = np; hose->arch_data = np;
hose->set_cfg_type = 1;
hose->first_busno = bus_range ? bus_range[0] : 0; hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->last_busno = bus_range ? bus_range[1] : 0xff;
hose->bus_offset = 0; hose->bus_offset = 0;
hose->set_cfg_type = 1;
setup_indirect_pci(hose, setup_indirect_pci(hose,
r.start + offsetof(pci_cpm2_t, pci_cfg_addr), r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
r.start + offsetof(pci_cpm2_t, pci_cfg_data)); r.start + offsetof(pci_cpm2_t, pci_cfg_data));

1
arch/powerpc/platforms/83xx/pci.c
View File

@@ -70,7 +70,6 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
if (!hose) if (!hose)
return -ENOMEM; return -ENOMEM;
hose->arch_data = dev; hose->arch_data = dev;
hose->set_cfg_type = 1;
hose->first_busno = bus_range ? bus_range[0] : 0; hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->last_busno = bus_range ? bus_range[1] : 0xff;

1
arch/powerpc/platforms/85xx/pci.c
View File

@@ -61,7 +61,6 @@ int __init mpc85xx_add_bridge(struct device_node *dev)
if (!hose) if (!hose)
return -ENOMEM; return -ENOMEM;
hose->arch_data = dev; hose->arch_data = dev;
hose->set_cfg_type = 1;
hose->first_busno = bus_range ? bus_range[0] : 0; hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->last_busno = bus_range ? bus_range[1] : 0xff;

1
arch/powerpc/platforms/86xx/pci.c
View File

@@ -172,7 +172,6 @@ int __init mpc86xx_add_bridge(struct device_node *dev)
if (!hose) if (!hose)
return -ENOMEM; return -ENOMEM;
hose->arch_data = dev; hose->arch_data = dev;
hose->set_cfg_type = 1;
/* last_busno = 0xfe cause by MPC8641 PCIE bug */ /* last_busno = 0xfe cause by MPC8641 PCIE bug */
hose->first_busno = bus_range ? bus_range[0] : 0x0; hose->first_busno = bus_range ? bus_range[0] : 0x0;

1
arch/powerpc/sysdev/mv64x60_pci.c
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@@ -142,7 +142,6 @@ static int __init mv64x60_add_bridge(struct device_node *dev)
return -ENOMEM; return -ENOMEM;
hose->arch_data = dev; hose->arch_data = dev;
hose->set_cfg_type = 1;
hose->first_busno = bus_range ? bus_range[0] : 0; hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->last_busno = bus_range ? bus_range[1] : 0xff;

1
arch/powerpc/sysdev/tsi108_pci.c
View File

@@ -226,7 +226,6 @@ int __init tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary)
return -ENOMEM; return -ENOMEM;
} }
hose->arch_data = dev; hose->arch_data = dev;
hose->set_cfg_type = 1;
hose->first_busno = bus_range ? bus_range[0] : 0; hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff; hose->last_busno = bus_range ? bus_range[1] : 0xff;