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asm-generic: merge branch 'master' of torvalds/linux-2.6

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Fixes a merge conflict against the x86 tree caused by a fix to
atomic.h which I renamed to atomic_long.h.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2009-06-12 09:53:47 +02:00
parent 26a28fa4fe 8ebf975608
commit 5b02ee3d21
1448 changed files with 99357 additions and 33162 deletions
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9
arch/m68k/include/asm/m520xsim.h
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@ -59,5 +59,14 @@
#define MCFPIT_IMR MCFINTC_IMRL
#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
/*
* Reset Controll Unit.
*/
#define MCF_RCR 0xFC0A0000
#define MCF_RSR 0xFC0A0001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/****************************************************************************/
#endif /* m520xsim_h */

9
arch/m68k/include/asm/m523xsim.h
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@ -41,5 +41,14 @@
#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */
#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */
/*
* Reset Controll Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/****************************************************************************/
#endif /* m523xsim_h */

9
arch/m68k/include/asm/m527xsim.h
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@ -70,5 +70,14 @@
#define UART2_ENABLE_MASK 0x3f00
#endif
/*
* Reset Controll Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/****************************************************************************/
#endif /* m527xsim_h */

8
arch/m68k/include/asm/m528xsim.h
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@ -56,6 +56,14 @@
#define MCF5282_INTC0_ICR17 (volatile u8 *) (MCF_IPSBAR + 0x0C51)
/*
* Reset Control Unit (relative to IPSBAR).
*/
#define MCF_RCR 0x110000
#define MCF_RSR 0x110001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/*********************************************************************
*

12
arch/m68k/include/asm/m532xsim.h
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@ -125,6 +125,18 @@
#define ACR_CM_OFF_IMP (3<<5)
#define ACR_WPROTECT (1<<2)
/*********************************************************************
*
* Reset Controller Module
*
*********************************************************************/
#define MCF_RCR 0xFC0A0000
#define MCF_RSR 0xFC0A0001
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
/*********************************************************************
*
* Inter-IC (I2C) Module

8
arch/m68k/include/asm/processor_no.h
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@ -72,10 +72,10 @@ struct thread_struct {
unsigned char fpstate[FPSTATESIZE]; /* floating point state */
};
#define INIT_THREAD { \
sizeof(init_stack) + (unsigned long) init_stack, 0, \
PS_S, __KERNEL_DS, \
{0, 0}, 0, {0,}, {0, 0, 0}, {0,}, \
#define INIT_THREAD { \
.ksp = sizeof(init_stack) + (unsigned long) init_stack, \
.sr = PS_S, \
.fs = __KERNEL_DS, \
}
/*

2
arch/m68k/include/asm/swab.h
View File

@ -1,7 +1,7 @@
#ifndef _M68K_SWAB_H
#define _M68K_SWAB_H
#include <asm/types.h>
#include <linux/types.h>
#include <linux/compiler.h>
#define __SWAB_64_THRU_32__

107
arch/m68k/include/asm/system_no.h
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@ -203,113 +203,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
#include <asm-generic/cmpxchg.h>
#endif
#if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
#define HARD_RESET_NOW() ({ \
local_irq_disable(); \
asm(" \
moveal #0x10c00000, %a0; \
moveb #0, 0xFFFFF300; \
moveal 0(%a0), %sp; \
moveal 4(%a0), %a0; \
jmp (%a0); \
"); \
})
#endif
#ifdef CONFIG_COLDFIRE
#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
/*
* Need to account for broken early mask of 5272 silicon. So don't
* jump through the original start address. Jump strait into the
* known start of the FLASH code.
*/
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
jmp 0xf0000400; \
"); \
})
#elif defined(CONFIG_NETtel) || \
defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
moveal #0x10000044, %a0; \
movel #0xffffffff, (%a0); \
moveal #0x10000001, %a0; \
moveb #0x00, (%a0); \
moveal #0xf0000004, %a0; \
moveal (%a0), %a0; \
jmp (%a0); \
"); \
})
#elif defined(CONFIG_M5272)
/*
* Retrieve the boot address in flash using CSBR0 and CSOR0
* find the reset vector at flash_address + 4 (e.g. 0x400)
* remap it in the flash's current location (e.g. 0xf0000400)
* and jump there.
*/
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %%sr; \
move.l %0+0x40,%%d0; \
and.l %0+0x44,%%d0; \
andi.l #0xfffff000,%%d0; \
mov.l %%d0,%%a0; \
or.l 4(%%a0),%%d0; \
mov.l %%d0,%%a0; \
jmp (%%a0);" \
: /* No output */ \
: "o" (*(char *)MCF_MBAR) ); \
})
#elif defined(CONFIG_M528x)
/*
* The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
* that when set, resets the MCF528x.
*/
#define HARD_RESET_NOW() \
({ \
unsigned char volatile *reset; \
asm("move.w #0x2700, %sr"); \
reset = ((volatile unsigned char *)(MCF_IPSBAR + 0x110000)); \
while(1) \
*reset |= (0x01 << 7);\
})
#elif defined(CONFIG_M523x)
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
movel #0x01000000, %sp; \
moveal #0x40110000, %a0; \
moveb #0x80, (%a0); \
"); \
})
#elif defined(CONFIG_M520x)
/*
* The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
* RCR), that when set, resets the MCF5208.
*/
#define HARD_RESET_NOW() \
({ \
unsigned char volatile *reset; \
asm("move.w #0x2700, %sr"); \
reset = ((volatile unsigned char *)(MCF_IPSBAR + 0xA0000)); \
while(1) \
*reset |= 0x80; \
})
#else
#define HARD_RESET_NOW() ({ \
asm(" \
movew #0x2700, %sr; \
moveal #0x4, %a0; \
moveal (%a0), %a0; \
jmp (%a0); \
"); \
})
#endif
#endif
#define arch_align_stack(x) (x)