[PATCH] FS_ENET: use PAL for mii management
This patch should update the fs_enet infrastructure to utilize Phy Abstraction Layer subsystem. Along with the above, there are apparent bugfixes, overhaul and improvements. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Vitaly Bordug
committed by
Jeff Garzik
Jeff Garzik
parent
11b0bacd71
commit
5b4b845434
@@ -33,6 +33,7 @@
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/bitops.h>
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#include <linux/platform_device.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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@@ -40,129 +41,25 @@
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#include "fs_enet.h"
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#ifdef CONFIG_8xx
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static int bitbang_prep_bit(u8 **dirp, u8 **datp, u8 *mskp, int port, int bit)
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static int bitbang_prep_bit(u8 **datp, u8 *mskp,
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struct fs_mii_bit *mii_bit)
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{
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immap_t *im = (immap_t *)fs_enet_immap;
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void *dir, *dat, *ppar;
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void *dat;
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int adv;
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u8 msk;
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switch (port) {
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case fsiop_porta:
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dir = &im->im_ioport.iop_padir;
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dat = &im->im_ioport.iop_padat;
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ppar = &im->im_ioport.iop_papar;
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break;
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dat = (void*) mii_bit->offset;
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case fsiop_portb:
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dir = &im->im_cpm.cp_pbdir;
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dat = &im->im_cpm.cp_pbdat;
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ppar = &im->im_cpm.cp_pbpar;
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break;
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case fsiop_portc:
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dir = &im->im_ioport.iop_pcdir;
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dat = &im->im_ioport.iop_pcdat;
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ppar = &im->im_ioport.iop_pcpar;
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break;
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case fsiop_portd:
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dir = &im->im_ioport.iop_pddir;
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dat = &im->im_ioport.iop_pddat;
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ppar = &im->im_ioport.iop_pdpar;
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break;
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case fsiop_porte:
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dir = &im->im_cpm.cp_pedir;
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dat = &im->im_cpm.cp_pedat;
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ppar = &im->im_cpm.cp_pepar;
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break;
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default:
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printk(KERN_ERR DRV_MODULE_NAME
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"Illegal port value %d!\n", port);
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return -EINVAL;
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}
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adv = bit >> 3;
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dir = (char *)dir + adv;
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adv = mii_bit->bit >> 3;
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dat = (char *)dat + adv;
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ppar = (char *)ppar + adv;
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msk = 1 << (7 - (bit & 7));
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if ((in_8(ppar) & msk) != 0) {
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printk(KERN_ERR DRV_MODULE_NAME
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"pin %d on port %d is not general purpose!\n", bit, port);
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return -EINVAL;
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}
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msk = 1 << (7 - (mii_bit->bit & 7));
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*dirp = dir;
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*datp = dat;
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*mskp = msk;
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return 0;
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}
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#endif
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#ifdef CONFIG_8260
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static int bitbang_prep_bit(u8 **dirp, u8 **datp, u8 *mskp, int port, int bit)
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{
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iop_cpm2_t *io = &((cpm2_map_t *)fs_enet_immap)->im_ioport;
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void *dir, *dat, *ppar;
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int adv;
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u8 msk;
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switch (port) {
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case fsiop_porta:
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dir = &io->iop_pdira;
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dat = &io->iop_pdata;
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ppar = &io->iop_ppara;
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break;
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case fsiop_portb:
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dir = &io->iop_pdirb;
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dat = &io->iop_pdatb;
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ppar = &io->iop_pparb;
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break;
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case fsiop_portc:
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dir = &io->iop_pdirc;
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dat = &io->iop_pdatc;
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ppar = &io->iop_pparc;
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break;
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case fsiop_portd:
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dir = &io->iop_pdird;
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dat = &io->iop_pdatd;
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ppar = &io->iop_ppard;
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break;
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default:
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printk(KERN_ERR DRV_MODULE_NAME
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"Illegal port value %d!\n", port);
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return -EINVAL;
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}
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adv = bit >> 3;
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dir = (char *)dir + adv;
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dat = (char *)dat + adv;
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ppar = (char *)ppar + adv;
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msk = 1 << (7 - (bit & 7));
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if ((in_8(ppar) & msk) != 0) {
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printk(KERN_ERR DRV_MODULE_NAME
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"pin %d on port %d is not general purpose!\n", bit, port);
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return -EINVAL;
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}
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*dirp = dir;
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*datp = dat;
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*mskp = msk;
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return 0;
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}
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#endif
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static inline void bb_set(u8 *p, u8 m)
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{
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@@ -179,44 +76,44 @@ static inline int bb_read(u8 *p, u8 m)
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return (in_8(p) & m) != 0;
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}
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static inline void mdio_active(struct fs_enet_mii_bus *bus)
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static inline void mdio_active(struct bb_info *bitbang)
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{
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bb_set(bus->bitbang.mdio_dir, bus->bitbang.mdio_msk);
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bb_set(bitbang->mdio_dir, bitbang->mdio_dir_msk);
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}
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static inline void mdio_tristate(struct fs_enet_mii_bus *bus)
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static inline void mdio_tristate(struct bb_info *bitbang )
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{
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bb_clr(bus->bitbang.mdio_dir, bus->bitbang.mdio_msk);
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bb_clr(bitbang->mdio_dir, bitbang->mdio_dir_msk);
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}
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static inline int mdio_read(struct fs_enet_mii_bus *bus)
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static inline int mdio_read(struct bb_info *bitbang )
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{
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return bb_read(bus->bitbang.mdio_dat, bus->bitbang.mdio_msk);
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return bb_read(bitbang->mdio_dat, bitbang->mdio_dat_msk);
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}
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static inline void mdio(struct fs_enet_mii_bus *bus, int what)
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static inline void mdio(struct bb_info *bitbang , int what)
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{
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if (what)
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bb_set(bus->bitbang.mdio_dat, bus->bitbang.mdio_msk);
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bb_set(bitbang->mdio_dat, bitbang->mdio_dat_msk);
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else
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bb_clr(bus->bitbang.mdio_dat, bus->bitbang.mdio_msk);
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bb_clr(bitbang->mdio_dat, bitbang->mdio_dat_msk);
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}
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static inline void mdc(struct fs_enet_mii_bus *bus, int what)
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static inline void mdc(struct bb_info *bitbang , int what)
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{
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if (what)
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bb_set(bus->bitbang.mdc_dat, bus->bitbang.mdc_msk);
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bb_set(bitbang->mdc_dat, bitbang->mdc_msk);
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else
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bb_clr(bus->bitbang.mdc_dat, bus->bitbang.mdc_msk);
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bb_clr(bitbang->mdc_dat, bitbang->mdc_msk);
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}
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static inline void mii_delay(struct fs_enet_mii_bus *bus)
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static inline void mii_delay(struct bb_info *bitbang )
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{
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udelay(bus->bus_info->i.bitbang.delay);
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udelay(bitbang->delay);
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}
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/* Utility to send the preamble, address, and register (common to read and write). */
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static void bitbang_pre(struct fs_enet_mii_bus *bus, int read, u8 addr, u8 reg)
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static void bitbang_pre(struct bb_info *bitbang , int read, u8 addr, u8 reg)
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{
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int j;
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@@ -228,177 +125,284 @@ static void bitbang_pre(struct fs_enet_mii_bus *bus, int read, u8 addr, u8 reg)
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* but it is safer and will be much more robust.
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*/
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mdio_active(bus);
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mdio(bus, 1);
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mdio_active(bitbang);
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mdio(bitbang, 1);
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for (j = 0; j < 32; j++) {
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mdc(bus, 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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}
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/* send the start bit (01) and the read opcode (10) or write (10) */
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mdc(bus, 0);
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mdio(bus, 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bus, 0);
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mdio(bus, 1);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bus, 0);
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mdio(bus, read);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bus, 0);
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mdio(bus, !read);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mdio(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, read);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, !read);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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/* send the PHY address */
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for (j = 0; j < 5; j++) {
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mdc(bus, 0);
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mdio(bus, (addr & 0x10) != 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mdio(bitbang, (addr & 0x10) != 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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addr <<= 1;
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}
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/* send the register address */
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for (j = 0; j < 5; j++) {
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mdc(bus, 0);
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mdio(bus, (reg & 0x10) != 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mdio(bitbang, (reg & 0x10) != 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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reg <<= 1;
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}
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}
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static int mii_read(struct fs_enet_mii_bus *bus, int phy_id, int location)
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static int fs_enet_mii_bb_read(struct mii_bus *bus , int phy_id, int location)
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{
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u16 rdreg;
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int ret, j;
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u8 addr = phy_id & 0xff;
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u8 reg = location & 0xff;
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struct bb_info* bitbang = bus->priv;
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bitbang_pre(bus, 1, addr, reg);
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bitbang_pre(bitbang, 1, addr, reg);
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/* tri-state our MDIO I/O pin so we can read */
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mdc(bus, 0);
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mdio_tristate(bus);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mdio_tristate(bitbang);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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/* check the turnaround bit: the PHY should be driving it to zero */
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if (mdio_read(bus) != 0) {
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if (mdio_read(bitbang) != 0) {
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/* PHY didn't drive TA low */
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for (j = 0; j < 32; j++) {
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mdc(bus, 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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}
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ret = -1;
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goto out;
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}
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mdc(bus, 0);
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mii_delay(bus);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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/* read 16 bits of register data, MSB first */
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rdreg = 0;
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for (j = 0; j < 16; j++) {
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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rdreg <<= 1;
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rdreg |= mdio_read(bus);
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mdc(bus, 0);
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mii_delay(bus);
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rdreg |= mdio_read(bitbang);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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}
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bus, 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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ret = rdreg;
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out:
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return ret;
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}
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static void mii_write(struct fs_enet_mii_bus *bus, int phy_id, int location, int val)
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static int fs_enet_mii_bb_write(struct mii_bus *bus, int phy_id, int location, u16 val)
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{
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int j;
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struct bb_info* bitbang = bus->priv;
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u8 addr = phy_id & 0xff;
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u8 reg = location & 0xff;
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u16 value = val & 0xffff;
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bitbang_pre(bus, 0, addr, reg);
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bitbang_pre(bitbang, 0, addr, reg);
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/* send the turnaround (10) */
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mdc(bus, 0);
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mdio(bus, 1);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bus, 0);
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mdio(bus, 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mdio(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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mdc(bitbang, 0);
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mdio(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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/* write 16 bits of register data, MSB first */
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for (j = 0; j < 16; j++) {
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mdc(bus, 0);
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mdio(bus, (value & 0x8000) != 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdc(bitbang, 0);
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mdio(bitbang, (value & 0x8000) != 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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value <<= 1;
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}
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/*
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* Tri-state the MDIO line.
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*/
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mdio_tristate(bus);
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mdc(bus, 0);
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mii_delay(bus);
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mdc(bus, 1);
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mii_delay(bus);
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mdio_tristate(bitbang);
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mdc(bitbang, 0);
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mii_delay(bitbang);
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mdc(bitbang, 1);
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mii_delay(bitbang);
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return 0;
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}
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int fs_mii_bitbang_init(struct fs_enet_mii_bus *bus)
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static int fs_enet_mii_bb_reset(struct mii_bus *bus)
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{
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/*nothing here - dunno how to reset it*/
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return 0;
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}
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static int fs_mii_bitbang_init(struct bb_info *bitbang, struct fs_mii_bb_platform_info* fmpi)
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{
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const struct fs_mii_bus_info *bi = bus->bus_info;
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int r;
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r = bitbang_prep_bit(&bus->bitbang.mdio_dir,
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&bus->bitbang.mdio_dat,
|
||||
&bus->bitbang.mdio_msk,
|
||||
bi->i.bitbang.mdio_port,
|
||||
bi->i.bitbang.mdio_bit);
|
||||
bitbang->delay = fmpi->delay;
|
||||
|
||||
r = bitbang_prep_bit(&bitbang->mdio_dir,
|
||||
&bitbang->mdio_dir_msk,
|
||||
&fmpi->mdio_dir);
|
||||
if (r != 0)
|
||||
return r;
|
||||
|
||||
r = bitbang_prep_bit(&bus->bitbang.mdc_dir,
|
||||
&bus->bitbang.mdc_dat,
|
||||
&bus->bitbang.mdc_msk,
|
||||
bi->i.bitbang.mdc_port,
|
||||
bi->i.bitbang.mdc_bit);
|
||||
r = bitbang_prep_bit(&bitbang->mdio_dat,
|
||||
&bitbang->mdio_dat_msk,
|
||||
&fmpi->mdio_dat);
|
||||
if (r != 0)
|
||||
return r;
|
||||
|
||||
bus->mii_read = mii_read;
|
||||
bus->mii_write = mii_write;
|
||||
r = bitbang_prep_bit(&bitbang->mdc_dat,
|
||||
&bitbang->mdc_msk,
|
||||
&fmpi->mdc_dat);
|
||||
if (r != 0)
|
||||
return r;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int __devinit fs_enet_mdio_probe(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct fs_mii_bb_platform_info *pdata;
|
||||
struct mii_bus *new_bus;
|
||||
struct bb_info *bitbang;
|
||||
int err = 0;
|
||||
|
||||
if (NULL == dev)
|
||||
return -EINVAL;
|
||||
|
||||
new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
|
||||
|
||||
if (NULL == new_bus)
|
||||
return -ENOMEM;
|
||||
|
||||
bitbang = kzalloc(sizeof(struct bb_info), GFP_KERNEL);
|
||||
|
||||
if (NULL == bitbang)
|
||||
return -ENOMEM;
|
||||
|
||||
new_bus->name = "BB MII Bus",
|
||||
new_bus->read = &fs_enet_mii_bb_read,
|
||||
new_bus->write = &fs_enet_mii_bb_write,
|
||||
new_bus->reset = &fs_enet_mii_bb_reset,
|
||||
new_bus->id = pdev->id;
|
||||
|
||||
new_bus->phy_mask = ~0x9;
|
||||
pdata = (struct fs_mii_bb_platform_info *)pdev->dev.platform_data;
|
||||
|
||||
if (NULL == pdata) {
|
||||
printk(KERN_ERR "gfar mdio %d: Missing platform data!\n", pdev->id);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/*set up workspace*/
|
||||
fs_mii_bitbang_init(bitbang, pdata);
|
||||
|
||||
new_bus->priv = bitbang;
|
||||
|
||||
new_bus->irq = pdata->irq;
|
||||
|
||||
new_bus->dev = dev;
|
||||
dev_set_drvdata(dev, new_bus);
|
||||
|
||||
err = mdiobus_register(new_bus);
|
||||
|
||||
if (0 != err) {
|
||||
printk (KERN_ERR "%s: Cannot register as MDIO bus\n",
|
||||
new_bus->name);
|
||||
goto bus_register_fail;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
bus_register_fail:
|
||||
kfree(bitbang);
|
||||
kfree(new_bus);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
static int fs_enet_mdio_remove(struct device *dev)
|
||||
{
|
||||
struct mii_bus *bus = dev_get_drvdata(dev);
|
||||
|
||||
mdiobus_unregister(bus);
|
||||
|
||||
dev_set_drvdata(dev, NULL);
|
||||
|
||||
iounmap((void *) (&bus->priv));
|
||||
bus->priv = NULL;
|
||||
kfree(bus);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct device_driver fs_enet_bb_mdio_driver = {
|
||||
.name = "fsl-bb-mdio",
|
||||
.bus = &platform_bus_type,
|
||||
.probe = fs_enet_mdio_probe,
|
||||
.remove = fs_enet_mdio_remove,
|
||||
};
|
||||
|
||||
int fs_enet_mdio_bb_init(void)
|
||||
{
|
||||
return driver_register(&fs_enet_bb_mdio_driver);
|
||||
}
|
||||
|
||||
void fs_enet_mdio_bb_exit(void)
|
||||
{
|
||||
driver_unregister(&fs_enet_bb_mdio_driver);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user