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x86: Cleanup vector usage

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Cleanup the vector usage and make them continuous if possible.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
LKML-Reference: <1295232722.1949.707.camel@sli10-conroe>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Shaohua Li
2011-01-17 10:52:02 +08:00
committed by Ingo Molnar
parent 795abaf1e4
commit 60f6e65d78
1 changed files with 27 additions and 25 deletions
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52
arch/x86/include/asm/irq_vectors.h
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@@ -1,6 +1,7 @@
#ifndef _ASM_X86_IRQ_VECTORS_H #ifndef _ASM_X86_IRQ_VECTORS_H
#define _ASM_X86_IRQ_VECTORS_H #define _ASM_X86_IRQ_VECTORS_H
#include <linux/threads.h>
/* /*
* Linux IRQ vector layout. * Linux IRQ vector layout.
* *
@@ -16,8 +17,8 @@
* Vectors 0 ... 31 : system traps and exceptions - hardcoded events * Vectors 0 ... 31 : system traps and exceptions - hardcoded events
* Vectors 32 ... 127 : device interrupts * Vectors 32 ... 127 : device interrupts
* Vector 128 : legacy int80 syscall interface * Vector 128 : legacy int80 syscall interface
* Vectors 129 ... 237 : device interrupts * Vectors 129 ... 229 : device interrupts
* Vectors 238 ... 255 : special interrupts * Vectors 230 ... 255 : special interrupts
* *
* 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table. * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
* *
@@ -96,10 +97,25 @@
#define THRESHOLD_APIC_VECTOR 0xf9 #define THRESHOLD_APIC_VECTOR 0xf9
#define REBOOT_VECTOR 0xf8 #define REBOOT_VECTOR 0xf8
/* f0-f7 used for spreading out TLB flushes: */ /*
#define INVALIDATE_TLB_VECTOR_END 0xf7 * Generic system vector for platform specific use
#define INVALIDATE_TLB_VECTOR_START 0xf0 */
#define NUM_INVALIDATE_TLB_VECTORS 8 #define X86_PLATFORM_IPI_VECTOR 0xf7
/*
* IRQ work vector:
*/
#define IRQ_WORK_VECTOR 0xf6
#define UV_BAU_MESSAGE 0xf5
/*
* Self IPI vector for machine checks
*/
#define MCE_SELF_VECTOR 0xf4
/* Xen vector callback to receive events in a HVM domain */
#define XEN_HVM_EVTCHN_CALLBACK 0xf3
/* /*
* Local APIC timer IRQ vector is on a different priority level, * Local APIC timer IRQ vector is on a different priority level,
@@ -108,25 +124,11 @@
*/ */
#define LOCAL_TIMER_VECTOR 0xef #define LOCAL_TIMER_VECTOR 0xef
/* /* f0-f7 used for spreading out TLB flushes: */
* Generic system vector for platform specific use #define NUM_INVALIDATE_TLB_VECTORS 8
*/ #define INVALIDATE_TLB_VECTOR_END 0xee
#define X86_PLATFORM_IPI_VECTOR 0xed #define INVALIDATE_TLB_VECTOR_START \
(INVALIDATE_TLB_VECTOR_END - NUM_INVALIDATE_TLB_VECTORS + 1)
/*
* IRQ work vector:
*/
#define IRQ_WORK_VECTOR 0xec
#define UV_BAU_MESSAGE 0xea
/*
* Self IPI vector for machine checks
*/
#define MCE_SELF_VECTOR 0xeb
/* Xen vector callback to receive events in a HVM domain */
#define XEN_HVM_EVTCHN_CALLBACK 0xe9
#define NR_VECTORS 256 #define NR_VECTORS 256