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Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

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This commit is contained in:
Russell King
2007-03-02 11:59:16 +00:00
committed by Russell King
parent 9623b3732d 1f4d177413
commit 6139dbbb77
15 changed files with 72 additions and 55 deletions
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4
arch/arm/mach-omap1/board-nokia770.c
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@@ -16,6 +16,8 @@
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#include <linux/spi/ads7846.h> #include <linux/spi/ads7846.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
@@ -103,7 +105,7 @@ static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata =
static struct spi_board_info nokia770_spi_board_info[] __initdata = { static struct spi_board_info nokia770_spi_board_info[] __initdata = {
[0] = { [0] = {
.modalias = "lcd_lph8923", .modalias = "lcd_mipid",
.bus_num = 2, .bus_num = 2,
.chip_select = 3, .chip_select = 3,
.max_speed_hz = 12000000, .max_speed_hz = 12000000,

20
arch/arm/mach-omap1/clock.c
View File

@@ -432,8 +432,7 @@ static int omap1_clk_enable(struct clk *clk)
} }
if (clk->flags & CLOCK_NO_IDLE_PARENT) if (clk->flags & CLOCK_NO_IDLE_PARENT)
if (!cpu_is_omap24xx()) omap1_clk_deny_idle(clk->parent);
omap1_clk_deny_idle(clk->parent);
} }
ret = clk->enable(clk); ret = clk->enable(clk);
@@ -454,8 +453,7 @@ static void omap1_clk_disable(struct clk *clk)
if (likely(clk->parent)) { if (likely(clk->parent)) {
omap1_clk_disable(clk->parent); omap1_clk_disable(clk->parent);
if (clk->flags & CLOCK_NO_IDLE_PARENT) if (clk->flags & CLOCK_NO_IDLE_PARENT)
if (!cpu_is_omap24xx()) omap1_clk_allow_idle(clk->parent);
omap1_clk_allow_idle(clk->parent);
} }
} }
} }
@@ -471,7 +469,7 @@ static int omap1_clk_enable_generic(struct clk *clk)
if (unlikely(clk->enable_reg == 0)) { if (unlikely(clk->enable_reg == 0)) {
printk(KERN_ERR "clock.c: Enable for %s without enable code\n", printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
clk->name); clk->name);
return 0; return -EINVAL;
} }
if (clk->flags & ENABLE_REG_32BIT) { if (clk->flags & ENABLE_REG_32BIT) {
@@ -651,10 +649,18 @@ int __init omap1_clk_init(void)
int crystal_type = 0; /* Default 12 MHz */ int crystal_type = 0; /* Default 12 MHz */
u32 reg; u32 reg;
#ifdef CONFIG_DEBUG_LL
/* Resets some clocks that may be left on from bootloader,
* but leaves serial clocks on.
*/
omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
#endif
/* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */ /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
reg = omap_readw(SOFT_REQ_REG) & (1 << 4); reg = omap_readw(SOFT_REQ_REG) & (1 << 4);
omap_writew(reg, SOFT_REQ_REG); omap_writew(reg, SOFT_REQ_REG);
omap_writew(0, SOFT_REQ_REG2); if (!cpu_is_omap15xx())
omap_writew(0, SOFT_REQ_REG2);
clk_init(&omap1_clk_functions); clk_init(&omap1_clk_functions);
@@ -685,7 +691,7 @@ int __init omap1_clk_init(void)
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
if (info != NULL) { if (info != NULL) {
if (!cpu_is_omap1510()) if (!cpu_is_omap15xx())
crystal_type = info->system_clock_type; crystal_type = info->system_clock_type;
} }

2
arch/arm/mach-omap1/irq.c
View File

@@ -238,7 +238,7 @@ void __init omap_init_irq(void)
if (cpu_is_omap730()) if (cpu_is_omap730())
omap_unmask_irq(INT_730_IH2_IRQ); omap_unmask_irq(INT_730_IH2_IRQ);
else if (cpu_is_omap1510()) else if (cpu_is_omap15xx())
omap_unmask_irq(INT_1510_IH2_IRQ); omap_unmask_irq(INT_1510_IH2_IRQ);
else if (cpu_is_omap16xx()) else if (cpu_is_omap16xx())
omap_unmask_irq(INT_1610_IH2_IRQ); omap_unmask_irq(INT_1610_IH2_IRQ);

12
arch/arm/mach-omap1/pm.c
View File

@@ -256,7 +256,8 @@ void omap_pm_suspend(void)
tps65010_set_led(LED1, OFF); tps65010_set_led(LED1, OFF);
} }
omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG); if (!cpu_is_omap15xx())
omap_writew(0xffff, ULPD_SOFT_DISABLE_REQ_REG);
/* /*
* Step 1: turn off interrupts (FIXME: NOTE: already disabled) * Step 1: turn off interrupts (FIXME: NOTE: already disabled)
@@ -434,7 +435,8 @@ void omap_pm_suspend(void)
MPUI1610_RESTORE(OMAP_IH2_3_MIR); MPUI1610_RESTORE(OMAP_IH2_3_MIR);
} }
omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); if (!cpu_is_omap15xx())
omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
/* /*
* Reenable interrupts * Reenable interrupts
@@ -704,6 +706,8 @@ static struct pm_ops omap_pm_ops ={
static int __init omap_pm_init(void) static int __init omap_pm_init(void)
{ {
int error;
printk("Power Management for TI OMAP.\n"); printk("Power Management for TI OMAP.\n");
/* /*
@@ -760,7 +764,9 @@ static int __init omap_pm_init(void)
omap_pm_init_proc(); omap_pm_init_proc();
#endif #endif
subsys_create_file(&power_subsys, &sleep_while_idle_attr); error = subsys_create_file(&power_subsys, &sleep_while_idle_attr);
if (error)
printk(KERN_ERR "subsys_create_file failed: %d\n", error);
if (cpu_is_omap16xx()) { if (cpu_is_omap16xx()) {
/* configure LOW_PWR pin */ /* configure LOW_PWR pin */

18
arch/arm/mach-omap1/serial.c
View File

@@ -1,7 +1,7 @@
/* /*
* linux/arch/arm/mach-omap1/serial.c * linux/arch/arm/mach-omap1/serial.c
* *
* OMAP1 CPU identification code * OMAP1 serial support.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
@@ -59,7 +59,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */ omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
if (!cpu_is_omap1510()) { if (!cpu_is_omap15xx()) {
omap_serial_outp(p, UART_OMAP_SYSC, 0x01); omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
} }
@@ -121,7 +121,7 @@ void __init omap_serial_init(void)
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2; serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
} }
if (cpu_is_omap1510()) { if (cpu_is_omap15xx()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
@@ -147,10 +147,10 @@ void __init omap_serial_init(void)
printk("Could not get uart1_ck\n"); printk("Could not get uart1_ck\n");
else { else {
clk_enable(uart1_ck); clk_enable(uart1_ck);
if (cpu_is_omap1510()) if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 12000000); clk_set_rate(uart1_ck, 12000000);
} }
if (cpu_is_omap1510()) { if (cpu_is_omap15xx()) {
omap_cfg_reg(UART1_TX); omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS); omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) { if (machine_is_omap_innovator()) {
@@ -167,12 +167,12 @@ void __init omap_serial_init(void)
printk("Could not get uart2_ck\n"); printk("Could not get uart2_ck\n");
else { else {
clk_enable(uart2_ck); clk_enable(uart2_ck);
if (cpu_is_omap1510()) if (cpu_is_omap15xx())
clk_set_rate(uart2_ck, 12000000); clk_set_rate(uart2_ck, 12000000);
else else
clk_set_rate(uart2_ck, 48000000); clk_set_rate(uart2_ck, 48000000);
} }
if (cpu_is_omap1510()) { if (cpu_is_omap15xx()) {
omap_cfg_reg(UART2_TX); omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS); omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) { if (machine_is_omap_innovator()) {
@@ -189,10 +189,10 @@ void __init omap_serial_init(void)
printk("Could not get uart3_ck\n"); printk("Could not get uart3_ck\n");
else { else {
clk_enable(uart3_ck); clk_enable(uart3_ck);
if (cpu_is_omap1510()) if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 12000000); clk_set_rate(uart3_ck, 12000000);
} }
if (cpu_is_omap1510()) { if (cpu_is_omap15xx()) {
omap_cfg_reg(UART3_TX); omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX); omap_cfg_reg(UART3_RX);
} }

13
arch/arm/mach-omap2/board-h4.c
View File

@@ -39,7 +39,6 @@
#include "prcm-regs.h" #include "prcm-regs.h"
#include <asm/io.h> #include <asm/io.h>
#include <asm/delay.h>
static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 }; static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 }; static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
@@ -179,9 +178,11 @@ static int h4_select_irda(struct device *dev, int state)
return err; return err;
} }
static void set_trans_mode(void *data) static void set_trans_mode(struct work_struct *work)
{ {
int *mode = data; struct omap_irda_config *irda_config =
container_of(work, struct omap_irda_config, gpio_expa.work);
int mode = irda_config->mode;
unsigned char expa; unsigned char expa;
int err = 0; int err = 0;
@@ -191,7 +192,7 @@ static void set_trans_mode(void *data)
expa &= ~0x01; expa &= ~0x01;
if (!(*mode & IR_SIRMODE)) { /* MIR/FIR */ if (!(mode & IR_SIRMODE)) { /* MIR/FIR */
expa |= 0x01; expa |= 0x01;
} }
@@ -204,9 +205,9 @@ static int h4_transceiver_mode(struct device *dev, int mode)
{ {
struct omap_irda_config *irda_config = dev->platform_data; struct omap_irda_config *irda_config = dev->platform_data;
irda_config->mode = mode;
cancel_delayed_work(&irda_config->gpio_expa); cancel_delayed_work(&irda_config->gpio_expa);
PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode); PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
#error this is not permitted - mode is an argument variable
schedule_delayed_work(&irda_config->gpio_expa, 0); schedule_delayed_work(&irda_config->gpio_expa, 0);
return 0; return 0;

3
arch/arm/mach-omap2/timer-gp.c
View File

@@ -24,6 +24,7 @@
#include <linux/err.h> #include <linux/err.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/irq.h>
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include <asm/arch/dmtimer.h> #include <asm/arch/dmtimer.h>
@@ -64,7 +65,7 @@ static void __init omap2_gp_timer_init(void)
BUG_ON(gptimer == NULL); BUG_ON(gptimer == NULL);
omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100; tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ;
tick_period -= 1; tick_period -= 1;
setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);

14
arch/arm/plat-omap/dma.c
View File

@@ -557,7 +557,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
omap_enable_channel_irq(free_ch); omap_enable_channel_irq(free_ch);
/* Clear the CSR register and IRQ status register */ /* Clear the CSR register and IRQ status register */
OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK; OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK;
omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0); omap_writel(1 << free_ch, OMAP_DMA4_IRQSTATUS_L0);
} }
*dma_ch_out = free_ch; *dma_ch_out = free_ch;
@@ -597,10 +597,7 @@ void omap_free_dma(int lch)
/* Clear the CSR register and IRQ status register */ /* Clear the CSR register and IRQ status register */
OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK; OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK;
omap_writel(1 << lch, OMAP_DMA4_IRQSTATUS_L0);
val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
val |= 1 << lch;
omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
/* Disable all DMA interrupts for the channel. */ /* Disable all DMA interrupts for the channel. */
OMAP_DMA_CICR_REG(lch) = 0; OMAP_DMA_CICR_REG(lch) = 0;
@@ -927,7 +924,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
static int omap2_dma_handle_ch(int ch) static int omap2_dma_handle_ch(int ch)
{ {
u32 status = OMAP_DMA_CSR_REG(ch); u32 status = OMAP_DMA_CSR_REG(ch);
u32 val;
if (!status) if (!status)
return 0; return 0;
@@ -948,11 +944,7 @@ static int omap2_dma_handle_ch(int ch)
dma_chan[ch].dev_id); dma_chan[ch].dev_id);
OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK; OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK;
omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
/* ch in this function is from 0-31 while in register it is 1-32 */
val = 1 << (ch);
omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
if (likely(dma_chan[ch].callback != NULL)) if (likely(dma_chan[ch].callback != NULL))
dma_chan[ch].callback(ch, status, dma_chan[ch].data); dma_chan[ch].callback(ch, status, dma_chan[ch].data);

6
arch/arm/plat-omap/dmtimer.c
View File

@@ -90,8 +90,8 @@ static struct omap_dm_timer dm_timers[] = {
{ .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 },
{ .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 },
{ .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 },
{ .phys_base = 0xfffb4400, .irq = INT_1610_GPTIMER7 }, { .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 },
{ .phys_base = 0xfffb4c00, .irq = INT_1610_GPTIMER8 }, { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 },
}; };
#elif defined(CONFIG_ARCH_OMAP2) #elif defined(CONFIG_ARCH_OMAP2)
@@ -314,6 +314,8 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
{ {
BUG(); BUG();
return 0;
} }
#endif #endif

9
arch/arm/plat-omap/gpio.c
View File

@@ -974,10 +974,11 @@ static struct irq_chip gpio_irq_chip = {
}; };
static struct irq_chip mpuio_irq_chip = { static struct irq_chip mpuio_irq_chip = {
.name = "MPUIO", .name = "MPUIO",
.ack = mpuio_ack_irq, .ack = mpuio_ack_irq,
.mask = mpuio_mask_irq, .mask = mpuio_mask_irq,
.unmask = mpuio_unmask_irq .unmask = mpuio_unmask_irq,
.set_type = gpio_irq_type,
}; };
static int initialized; static int initialized;

2
arch/arm/plat-omap/mcbsp.c
View File

@@ -20,8 +20,8 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h>
#include <asm/delay.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/irq.h> #include <asm/irq.h>

4
arch/arm/plat-omap/mux.c
View File

@@ -116,7 +116,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
} }
/* Check for pull up or pull down selection on 1610 */ /* Check for pull up or pull down selection on 1610 */
if (!cpu_is_omap1510()) { if (!cpu_is_omap15xx()) {
if (cfg->pu_pd_reg && cfg->pull_val) { if (cfg->pu_pd_reg && cfg->pull_val) {
spin_lock_irqsave(&mux_spin_lock, flags); spin_lock_irqsave(&mux_spin_lock, flags);
pu_pd_orig = omap_readl(cfg->pu_pd_reg); pu_pd_orig = omap_readl(cfg->pu_pd_reg);
@@ -172,7 +172,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
if (!cpu_is_omap1510()) { if (!cpu_is_omap15xx()) {
if (cfg->pu_pd_reg && cfg->pull_val) { if (cfg->pu_pd_reg && cfg->pull_val) {
printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n",
cfg->pu_pd_name, cfg->pu_pd_reg, cfg->pu_pd_name, cfg->pu_pd_reg,

6
include/asm-arm/arch-omap/entry-macro.S
View File

@@ -61,6 +61,12 @@
.macro disable_fiq .macro disable_fiq
.endm .endm
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =VA_IC_BASE ldr \base, =VA_IC_BASE
ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */

2
include/asm-arm/arch-omap/memory.h
View File

@@ -70,7 +70,7 @@
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
#define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0)) #define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0))
#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ #define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \
(dma_addr_t)virt_to_lbus(page_address(page)) : \ (dma_addr_t)virt_to_lbus(page_address(page)) : \

12
include/asm-arm/arch-omap/omap-alsa.h
View File

@@ -65,7 +65,7 @@ struct audio_stream {
int period; /* current transfer period */ int period; /* current transfer period */
int periods; /* current count of periods registerd in the DMA engine */ int periods; /* current count of periods registerd in the DMA engine */
spinlock_t dma_lock; /* for locking in DMA operations */ spinlock_t dma_lock; /* for locking in DMA operations */
snd_pcm_substream_t *stream; /* the pcm stream */ struct snd_pcm_substream *stream; /* the pcm stream */
unsigned linked:1; /* dma channels linked */ unsigned linked:1; /* dma channels linked */
int offset; /* store start position of the last period in the alsa buffer */ int offset; /* store start position of the last period in the alsa buffer */
int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */ int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */
@@ -76,8 +76,8 @@ struct audio_stream {
* Alsa card structure for aic23 * Alsa card structure for aic23
*/ */
struct snd_card_omap_codec { struct snd_card_omap_codec {
snd_card_t *card; struct snd_card *card;
snd_pcm_t *pcm; struct snd_pcm *pcm;
long samplerate; long samplerate;
struct audio_stream s[2]; /* playback & capture */ struct audio_stream s[2]; /* playback & capture */
}; };
@@ -89,9 +89,9 @@ struct snd_card_omap_codec {
struct omap_alsa_codec_config { struct omap_alsa_codec_config {
char *name; char *name;
struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa; struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa;
snd_pcm_hw_constraint_list_t *hw_constraints_rates; struct snd_pcm_hw_constraint_list *hw_constraints_rates;
snd_pcm_hardware_t *snd_omap_alsa_playback; struct snd_pcm_hardware *snd_omap_alsa_playback;
snd_pcm_hardware_t *snd_omap_alsa_capture; struct snd_pcm_hardware *snd_omap_alsa_capture;
void (*codec_configure_dev)(void); void (*codec_configure_dev)(void);
void (*codec_set_samplerate)(long); void (*codec_set_samplerate)(long);
void (*codec_clock_setup)(void); void (*codec_clock_setup)(void);