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[media] omap3isp: Calculate vpclk_div for CSI-2

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The video port clock is l3_ick divided by vpclk_div. This clock must be high
enough for the external pixel rate. The video port requires two clock cycles
to process a pixel.

Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
Sakari Ailus 2015-03-25 19:57:32 -03:00 committed by Mauro Carvalho Chehab
parent 3494bb0594
commit 6387b75284
2 changed files with 7 additions and 3 deletions
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8
drivers/media/platform/omap3isp/ispcsi2.c
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@ -548,6 +548,7 @@ int omap3isp_csi2_reset(struct isp_csi2_device *csi2)
static int csi2_configure(struct isp_csi2_device *csi2)
{
struct isp_pipeline *pipe = to_isp_pipeline(&csi2->subdev.entity);
const struct isp_bus_cfg *buscfg;
struct isp_device *isp = csi2->isp;
struct isp_csi2_timing_cfg *timing = &csi2->timing[0];
@ -570,7 +571,12 @@ static int csi2_configure(struct isp_csi2_device *csi2)
csi2->frame_skip = 0;
v4l2_subdev_call(sensor, sensor, g_skip_frames, &csi2->frame_skip);
csi2->ctrl.vp_out_ctrl = buscfg->bus.csi2.vpclk_div;
csi2->ctrl.vp_out_ctrl =
clamp_t(unsigned int, pipe->l3_ick / pipe->external_rate - 1,
1, 3);
dev_dbg(isp->dev, "%s: l3_ick %lu, external_rate %u, vp_out_ctrl %u\n",
__func__, pipe->l3_ick, pipe->external_rate,
csi2->ctrl.vp_out_ctrl);
csi2->ctrl.frame_mode = ISP_CSI2_FRAME_IMMEDIATE;
csi2->ctrl.ecc_enable = buscfg->bus.csi2.crc;

2
include/media/omap3isp.h
View File

@ -129,11 +129,9 @@ struct isp_ccp2_cfg {
/**
* struct isp_csi2_cfg - CSI2 interface configuration
* @crc: Enable the cyclic redundancy check
* @vpclk_div: Video port output clock control
*/
struct isp_csi2_cfg {
unsigned crc:1;
unsigned vpclk_div:2;
struct isp_csiphy_lanes_cfg lanecfg;
};