Merge linux-2.6 with linux-acpi-2.6
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@@ -91,6 +91,7 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
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{
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struct msi_desc *entry;
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struct msg_address address;
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unsigned int irq = vector;
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entry = (struct msi_desc *)msi_desc[vector];
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if (!entry || !entry->dev)
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@@ -112,6 +113,7 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
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entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask);
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pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
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address.lo_address.value);
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set_native_irq_info(irq, cpu_mask);
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break;
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}
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case PCI_CAP_ID_MSIX:
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@@ -125,22 +127,13 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
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MSI_TARGET_CPU_SHIFT);
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entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask);
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writel(address.lo_address.value, entry->mask_base + offset);
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set_native_irq_info(irq, cpu_mask);
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break;
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}
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default:
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break;
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}
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}
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#ifdef CONFIG_IRQBALANCE
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static inline void move_msi(int vector)
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{
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if (!cpus_empty(pending_irq_balance_cpumask[vector])) {
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set_msi_affinity(vector, pending_irq_balance_cpumask[vector]);
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cpus_clear(pending_irq_balance_cpumask[vector]);
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}
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}
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#endif /* CONFIG_IRQBALANCE */
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#endif /* CONFIG_SMP */
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static void mask_MSI_irq(unsigned int vector)
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@@ -191,13 +184,13 @@ static void shutdown_msi_irq(unsigned int vector)
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static void end_msi_irq_wo_maskbit(unsigned int vector)
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{
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move_msi(vector);
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move_native_irq(vector);
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ack_APIC_irq();
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}
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static void end_msi_irq_w_maskbit(unsigned int vector)
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{
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move_msi(vector);
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move_native_irq(vector);
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unmask_MSI_irq(vector);
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ack_APIC_irq();
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}
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@@ -19,7 +19,6 @@
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#define NR_HP_RESERVED_VECTORS 20
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extern int vector_irq[NR_VECTORS];
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extern cpumask_t pending_irq_balance_cpumask[NR_IRQS];
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extern void (*interrupt[NR_IRQS])(void);
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extern int pci_vector_resources(int last, int nr_released);
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@@ -29,10 +28,6 @@ extern int pci_vector_resources(int last, int nr_released);
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#define set_msi_irq_affinity NULL
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#endif
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#ifndef CONFIG_IRQBALANCE
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static inline void move_msi(int vector) {}
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#endif
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/*
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* MSI-X Address Register
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*/
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@@ -333,13 +333,17 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
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if (platform_pci_choose_state) {
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ret = platform_pci_choose_state(dev, state);
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if (ret >= 0)
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state = ret;
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state.event = ret;
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}
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switch (state) {
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case 0: return PCI_D0;
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case 3: return PCI_D3hot;
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switch (state.event) {
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case PM_EVENT_ON:
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return PCI_D0;
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case PM_EVENT_FREEZE:
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case PM_EVENT_SUSPEND:
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return PCI_D3hot;
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default:
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printk("They asked me for state %d\n", state);
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printk("They asked me for state %d\n", state.event);
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BUG();
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}
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return PCI_D0;
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@@ -421,6 +421,25 @@ static void __devinit quirk_via_ioapic(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic );
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/*
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* VIA 8237: Some BIOSs don't set the 'Bypass APIC De-Assert Message' Bit.
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* This leads to doubled level interrupt rates.
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* Set this bit to get rid of cycle wastage.
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* Otherwise uncritical.
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*/
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static void __devinit quirk_via_vt8237_bypass_apic_deassert(struct pci_dev *dev)
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{
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u8 misc_control2;
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#define BYPASS_APIC_DEASSERT 8
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pci_read_config_byte(dev, 0x5B, &misc_control2);
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if (!(misc_control2 & BYPASS_APIC_DEASSERT)) {
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printk(KERN_INFO "PCI: Bypassing VIA 8237 APIC De-Assert Message\n");
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pci_write_config_byte(dev, 0x5B, misc_control2|BYPASS_APIC_DEASSERT);
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_vt8237_bypass_apic_deassert);
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/*
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* The AMD io apic can hang the box when an apic irq is masked.
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* We check all revs >= B0 (yet not in the pre production!) as the bug
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