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[PATCH] USB: more omap_udc updates (dma and omap1710)

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More omap_udc updates:

  * OMAP 1710 updates
      - new UDC bit for clearing endpoint toggle, affecting CLEAR_HALT
      - new OTG bits affecting wakeup
  * Fix the bug Vladimir noted, that IN-DMA transfer code path kicks in
    for under 1024 bytes (not "up to 1024 bytes")
  * Handle transceiver setup more intelligently
      - use transceiver whenever one's available; this can be handy
        for GPIO based, loopback, or transceiverless configs
      - cleanup correctly after the "unrecognized HMC" case
  * DMA performance tweaks
      - allow burst/pack for memory access
      - use 16 bit DMA access most of the time on TIPB
  * Add workarounds for some DMA errata (not observed "in the wild"):
      - DMA CSAC/CDAC reads returning zero
      - RX/TX DMA config registers bit 12 always reads as zero (TI patch)
  * More "sparse" warnings removed, notably "changing" the SETUP packet
    to return data in USB byteorder (an API change, null effect on OMAP
    except for these warnings).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
David Brownell
2005-04-28 13:52:31 -07:00
committed by Greg Kroah-Hartman
parent 907cba35f7
commit 65111084c6
3 changed files with 125 additions and 41 deletions
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4
drivers/usb/gadget/omap_udc.h
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@@ -20,6 +20,7 @@
#define UDC_CTRL_REG UDC_REG(0x0C) /* Endpoint control */
# define UDC_CLR_HALT (1 << 7)
# define UDC_SET_HALT (1 << 6)
# define UDC_CLRDATA_TOGGLE (1 << 3)
# define UDC_SET_FIFO_EN (1 << 2)
# define UDC_CLR_EP (1 << 1)
# define UDC_RESET_EP (1 << 0)
@@ -99,6 +100,7 @@
/* DMA configuration registers: up to three channels in each direction. */
#define UDC_RXDMA_CFG_REG UDC_REG(0x40) /* 3 eps for RX DMA */
# define UDC_DMA_REQ (1 << 12)
#define UDC_TXDMA_CFG_REG UDC_REG(0x44) /* 3 eps for TX DMA */
#define UDC_DATA_DMA_REG UDC_REG(0x48) /* rx/tx fifo addr */
@@ -162,6 +164,7 @@ struct omap_udc {
spinlock_t lock;
struct omap_ep ep[32];
u16 devstat;
u16 clr_halt;
struct otg_transceiver *transceiver;
struct list_head iso;
unsigned softconnect:1;
@@ -171,7 +174,6 @@ struct omap_udc {
unsigned ep0_set_config:1;
unsigned ep0_reset_config:1;
unsigned ep0_setup:1;
struct completion *done;
};