drm/nouveau: inform userspace of new kernel subchannel requirements
All available subchannels are now available for userspace to do with as it pleases on NVC0+. On all earlier chipsets, the kernel still uses a software object on subc 0 to implement the page flip completion method. I hope to find some decent way of addressing this too, but it's a tad tricker prior to fermi. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@@ -436,18 +436,11 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
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}
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if (dev_priv->card_type < NV_C0) {
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if (dev_priv->card_type < NV_C0) {
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init->subchan[0].handle = NvM2MF;
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init->subchan[0].handle = NvSw;
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if (dev_priv->card_type < NV_50)
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init->subchan[0].grclass = NV_SW;
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init->subchan[0].grclass = 0x0039;
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else
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init->subchan[0].grclass = 0x5039;
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init->subchan[1].handle = NvSw;
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init->subchan[1].grclass = NV_SW;
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init->nr_subchan = 2;
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} else {
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init->subchan[0].handle = 0x9039;
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init->subchan[0].grclass = 0x9039;
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init->nr_subchan = 1;
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init->nr_subchan = 1;
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} else {
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init->nr_subchan = 0;
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}
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}
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/* Named memory object area */
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/* Named memory object area */
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@@ -48,8 +48,8 @@ void nv50_dma_push(struct nouveau_channel *, struct nouveau_bo *,
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/* Hardcoded object assignments to subchannels (subchannel id). */
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/* Hardcoded object assignments to subchannels (subchannel id). */
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enum {
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enum {
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NvSubM2MF = 0,
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NvSubSw = 0,
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NvSubSw = 1,
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NvSubM2MF = 1,
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NvSub2D = 2,
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NvSub2D = 2,
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NvSubCtxSurf2D = 2,
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NvSubCtxSurf2D = 2,
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NvSubGdiRect = 3,
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NvSubGdiRect = 3,
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