[ARM] 3430/1: ARM: OMAP: 5/8 Update PM
Patch from Tony Lindgren Update OMAP PM code from linux-omap tree: - Move PM code from plat-omap to mach-omap1 and mach-omap2 by Tony Lindgren - Add minimal PM support for omap24xx by Tony Lindgren and Richard Woodruff - Misc updates to omap1 PM code by Tuukka Tikkanen et al - Updates to the SRAM code needed for PM and FB by Imre Deak Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Tony Lindgren
committed by
Russell King
Russell King
parent
6e60e79a1d
commit
670c104ae8
@@ -16,24 +16,94 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/mach/map.h>
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#include <asm/tlb.h>
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#include <asm/io.h>
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#include <asm/cacheflush.h>
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#include <asm/mach/map.h>
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#include <asm/arch/sram.h>
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#include <asm/arch/board.h>
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#define OMAP1_SRAM_PA 0x20000000
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#define OMAP1_SRAM_VA 0xd0000000
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#define OMAP2_SRAM_PA 0x40200000
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#define OMAP2_SRAM_PUB_PA 0x4020f800
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#define OMAP2_SRAM_VA 0xd0000000
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#define OMAP2_SRAM_PUB_VA 0xd0000800
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#if defined(CONFIG_ARCH_OMAP24XX)
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#define SRAM_BOOTLOADER_SZ 0x00
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#else
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#define SRAM_BOOTLOADER_SZ 0x80
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#endif
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#define VA_REQINFOPERM0 IO_ADDRESS(0x68005048)
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#define VA_READPERM0 IO_ADDRESS(0x68005050)
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#define VA_WRITEPERM0 IO_ADDRESS(0x68005058)
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#define VA_CONTROL_STAT IO_ADDRESS(0x480002F8)
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#define GP_DEVICE 0x300
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#define TYPE_MASK 0x700
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#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
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static unsigned long omap_sram_base;
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static unsigned long omap_sram_size;
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static unsigned long omap_sram_ceil;
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unsigned long omap_fb_sram_start;
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unsigned long omap_fb_sram_size;
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/* Depending on the target RAMFS firewall setup, the public usable amount of
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* SRAM varies. The default accessable size for all device types is 2k. A GP
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* device allows ARM11 but not other initators for full size. This
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* functionality seems ok until some nice security API happens.
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*/
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static int is_sram_locked(void)
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{
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int type = 0;
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if (cpu_is_omap242x())
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type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
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if (type == GP_DEVICE) {
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/* RAMFW: R/W access to all initators for all qualifier sets */
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if (cpu_is_omap242x()) {
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__raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
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__raw_writel(0xCFDE, VA_READPERM0); /* all i-read */
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__raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
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}
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return 0;
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} else
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return 1; /* assume locked with no PPA or security driver */
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}
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void get_fb_sram_conf(unsigned long start_avail, unsigned size_avail,
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unsigned long *start, unsigned long *size)
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{
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const struct omap_fbmem_config *fbmem_conf;
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fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config);
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if (fbmem_conf != NULL) {
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*start = fbmem_conf->fb_sram_start;
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*size = fbmem_conf->fb_sram_size;
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} else {
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*size = 0;
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*start = 0;
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}
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if (*size && (
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*start < start_avail ||
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*start + *size > start_avail + size_avail)) {
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printk(KERN_ERR "invalid FB SRAM configuration\n");
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*start = start_avail;
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*size = size_avail;
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}
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if (*size)
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pr_info("Reserving %lu bytes SRAM for frame buffer\n", *size);
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}
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/*
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* The amount of SRAM depends on the core type.
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* Note that we cannot try to test for SRAM here because writes
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@@ -42,26 +112,45 @@ static unsigned long omap_sram_ceil;
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*/
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void __init omap_detect_sram(void)
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{
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if (!cpu_is_omap24xx())
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unsigned long sram_start;
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if (cpu_is_omap24xx()) {
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if (is_sram_locked()) {
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omap_sram_base = OMAP2_SRAM_PUB_VA;
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sram_start = OMAP2_SRAM_PUB_PA;
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omap_sram_size = 0x800; /* 2K */
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} else {
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omap_sram_base = OMAP2_SRAM_VA;
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sram_start = OMAP2_SRAM_PA;
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if (cpu_is_omap242x())
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omap_sram_size = 0xa0000; /* 640K */
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else if (cpu_is_omap243x())
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omap_sram_size = 0x10000; /* 64K */
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}
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} else {
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omap_sram_base = OMAP1_SRAM_VA;
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else
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omap_sram_base = OMAP2_SRAM_VA;
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sram_start = OMAP1_SRAM_PA;
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if (cpu_is_omap730())
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omap_sram_size = 0x32000; /* 200K */
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else if (cpu_is_omap15xx())
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omap_sram_size = 0x30000; /* 192K */
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else if (cpu_is_omap1610() || cpu_is_omap1621() || cpu_is_omap1710())
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omap_sram_size = 0x4000; /* 16K */
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else if (cpu_is_omap1611())
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omap_sram_size = 0x3e800; /* 250K */
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else if (cpu_is_omap2420())
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omap_sram_size = 0xa0014; /* 640K */
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else {
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printk(KERN_ERR "Could not detect SRAM size\n");
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omap_sram_size = 0x4000;
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if (cpu_is_omap730())
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omap_sram_size = 0x32000; /* 200K */
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else if (cpu_is_omap15xx())
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omap_sram_size = 0x30000; /* 192K */
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else if (cpu_is_omap1610() || cpu_is_omap1621() ||
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cpu_is_omap1710())
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omap_sram_size = 0x4000; /* 16K */
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else if (cpu_is_omap1611())
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omap_sram_size = 0x3e800; /* 250K */
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else {
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printk(KERN_ERR "Could not detect SRAM size\n");
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omap_sram_size = 0x4000;
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}
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}
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get_fb_sram_conf(sram_start + SRAM_BOOTLOADER_SZ,
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omap_sram_size - SRAM_BOOTLOADER_SZ,
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&omap_fb_sram_start, &omap_fb_sram_size);
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if (omap_fb_sram_size)
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omap_sram_size -= sram_start + omap_sram_size -
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omap_fb_sram_start;
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omap_sram_ceil = omap_sram_base + omap_sram_size;
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}
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@@ -80,12 +169,20 @@ static struct map_desc omap_sram_io_desc[] __initdata = {
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*/
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void __init omap_map_sram(void)
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{
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unsigned long base;
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if (omap_sram_size == 0)
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return;
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if (cpu_is_omap24xx()) {
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omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
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omap_sram_io_desc[0].pfn = __phys_to_pfn(OMAP2_SRAM_PA);
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if (is_sram_locked())
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base = OMAP2_SRAM_PUB_PA;
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else
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base = OMAP2_SRAM_PA;
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base = ROUND_DOWN(base, PAGE_SIZE);
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omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
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}
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omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
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@@ -93,7 +190,8 @@ void __init omap_map_sram(void)
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iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
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printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
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omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual,
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__pfn_to_phys(omap_sram_io_desc[0].pfn),
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omap_sram_io_desc[0].virtual,
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omap_sram_io_desc[0].length);
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/*
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@@ -118,8 +216,9 @@ void * omap_sram_push(void * start, unsigned long size)
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printk(KERN_ERR "Not enough space in SRAM\n");
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return NULL;
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}
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omap_sram_ceil -= size;
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omap_sram_ceil &= ~0x3;
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omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
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memcpy((void *)omap_sram_ceil, start, size);
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return (void *)omap_sram_ceil;
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