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ARM: shmobile: marzen: Use DT for GIC

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Current Marzen is using DT booting,
and r8a7779.dtsi already has GIC settings.

So, we can remove the C version of the GIC setup code,
instead rely on GIC information provided by DT.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Kuninori Morimoto 2013-08-01 23:39:34 -07:00 committed by Simon Horman
parent 15645581a9
commit 693ac41df3
3 changed files with 5 additions and 21 deletions
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3
arch/arm/mach-shmobile/board-marzen.c
View File

@ -247,8 +247,7 @@ DT_MACHINE_START(MARZEN, "marzen")
.smp = smp_ops(r8a7779_smp_ops), .smp = smp_ops(r8a7779_smp_ops),
.map_io = r8a7779_map_io, .map_io = r8a7779_map_io,
.init_early = r8a7779_add_early_devices, .init_early = r8a7779_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY, .init_irq = r8a7779_init_irq_dt,
.init_irq = r8a7779_init_irq,
.init_machine = marzen_init, .init_machine = marzen_init,
.init_late = r8a7779_init_late, .init_late = r8a7779_init_late,
.dt_compat = marzen_boards_compat_dt, .dt_compat = marzen_boards_compat_dt,

1
arch/arm/mach-shmobile/include/mach/r8a7779.h
View File

@ -25,7 +25,6 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d)
} }
extern void r8a7779_init_delay(void); extern void r8a7779_init_delay(void);
extern void r8a7779_init_irq(void);
extern void r8a7779_init_irq_extpin(int irlm); extern void r8a7779_init_irq_extpin(int irlm);
extern void r8a7779_init_irq_dt(void); extern void r8a7779_init_irq_dt(void);
extern void r8a7779_map_io(void); extern void r8a7779_map_io(void);

22
arch/arm/mach-shmobile/intc-r8a7779.c
View File

@ -90,15 +90,18 @@ void __init r8a7779_init_irq_extpin(int irlm)
pr_warn("r8a7779: unable to setup external irq pin mode\n"); pr_warn("r8a7779: unable to setup external irq pin mode\n");
} }
#ifdef CONFIG_OF
static int r8a7779_set_wake(struct irq_data *data, unsigned int on) static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
{ {
return 0; /* always allow wakeup */ return 0; /* always allow wakeup */
} }
static void __init r8a7779_init_irq_common(void) void __init r8a7779_init_irq_dt(void)
{ {
gic_arch_extn.irq_set_wake = r8a7779_set_wake; gic_arch_extn.irq_set_wake = r8a7779_set_wake;
irqchip_init();
/* route all interrupts to ARM */ /* route all interrupts to ARM */
__raw_writel(0xffffffff, INT2NTSR0); __raw_writel(0xffffffff, INT2NTSR0);
__raw_writel(0x3fffffff, INT2NTSR1); __raw_writel(0x3fffffff, INT2NTSR1);
@ -109,23 +112,6 @@ static void __init r8a7779_init_irq_common(void)
__raw_writel(0xfffbffdf, INT2SMSKCR2); __raw_writel(0xfffbffdf, INT2SMSKCR2);
__raw_writel(0xbffffffc, INT2SMSKCR3); __raw_writel(0xbffffffc, INT2SMSKCR3);
__raw_writel(0x003fee3f, INT2SMSKCR4); __raw_writel(0x003fee3f, INT2SMSKCR4);
}
void __init r8a7779_init_irq(void)
{
void __iomem *gic_dist_base = IOMEM(0xf0001000);
void __iomem *gic_cpu_base = IOMEM(0xf0000100);
/* use GIC to handle interrupts */
gic_init(0, 29, gic_dist_base, gic_cpu_base);
r8a7779_init_irq_common();
}
#ifdef CONFIG_OF
void __init r8a7779_init_irq_dt(void)
{
irqchip_init();
r8a7779_init_irq_common();
} }
#endif #endif