Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits) MIPS: Use GCC __builtin_prefetch() to implement prefetch(). MIPS: Octeon: Serial port fixes for OCTEON simulator. MIPS: Octeon: Get rid of early serial. MIPS: AR7: prevent race between clock initialization and devices registration MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT} MIPS: MTX-1: Update defconfig MIPS: BCM47xx: Update defconfig MIPS: RB532: Update defconfig MIPS: AR7: Update defconfig RTC: rtc-cmos: Fix binary mode support MIPS: Oprofile: Loongson: Cleanup the comments MIPS: Oprofile: Loongson: Cleanup of the macros MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup() MIPS: Oprofile: Loongson: Remove useless parentheses MIPS: Oprofile: Loongson: Unify macro for setting events MIPS: nofpu and nodsp only affect CPU0 MIPS: Clean up tables for bootmem allocation MIPS: Coding style cleanups of access of FCSR rounding mode bits MIPS: Loongson 2F: Add gpio/gpioilb support ...
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@ -125,6 +125,30 @@ static int __init wait_disable(char *s)
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__setup("nowait", wait_disable);
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static int __cpuinitdata mips_fpu_disabled;
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static int __init fpu_disable(char *s)
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{
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cpu_data[0].options &= ~MIPS_CPU_FPU;
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mips_fpu_disabled = 1;
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return 1;
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}
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__setup("nofpu", fpu_disable);
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int __cpuinitdata mips_dsp_disabled;
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static int __init dsp_disable(char *s)
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{
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cpu_data[0].ases &= ~MIPS_ASE_DSP;
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mips_dsp_disabled = 1;
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return 1;
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}
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__setup("nodsp", dsp_disable);
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void __init check_wait(void)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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@ -982,6 +1006,12 @@ __cpuinit void cpu_probe(void)
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*/
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BUG_ON(current_cpu_type() != c->cputype);
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if (mips_fpu_disabled)
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c->options &= ~MIPS_CPU_FPU;
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if (mips_dsp_disabled)
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c->ases &= ~MIPS_ASE_DSP;
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if (c->options & MIPS_CPU_FPU) {
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c->fpu_id = cpu_get_fpu_id();
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@ -65,7 +65,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy,
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return -ENODEV;
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cpus_allowed = current->cpus_allowed;
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set_cpus_allowed(current, cpumask_of_cpu(cpu));
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set_cpus_allowed_ptr(current, cpumask_of(cpu));
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if (cpufreq_frequency_table_target
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(policy, &loongson2_clockmod_table[0], target_freq, relation,
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@ -91,7 +91,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy,
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/* notifiers */
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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set_cpus_allowed(current, cpus_allowed);
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set_cpus_allowed_ptr(current, &cpus_allowed);
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/* setting the cpu frequency */
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clk_set_rate(cpuclk, freq);
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@ -100,10 +100,10 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
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if (test_ti_thread_flag(ti, TIF_FPUBOUND) &&
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cpus_intersects(new_mask, mt_fpu_cpumask)) {
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cpus_and(effective_mask, new_mask, mt_fpu_cpumask);
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retval = set_cpus_allowed(p, effective_mask);
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retval = set_cpus_allowed_ptr(p, &effective_mask);
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} else {
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clear_ti_thread_flag(ti, TIF_FPUBOUND);
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retval = set_cpus_allowed(p, new_mask);
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retval = set_cpus_allowed_ptr(p, &new_mask);
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}
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out_unlock:
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@ -569,27 +569,6 @@ void __init setup_arch(char **cmdline_p)
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plat_smp_setup();
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}
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static int __init fpu_disable(char *s)
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{
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int i;
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for (i = 0; i < NR_CPUS; i++)
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cpu_data[i].options &= ~MIPS_CPU_FPU;
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return 1;
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}
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__setup("nofpu", fpu_disable);
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static int __init dsp_disable(char *s)
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{
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cpu_data[0].ases &= ~MIPS_ASE_DSP;
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return 1;
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}
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__setup("nodsp", dsp_disable);
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unsigned long kernelsp[NR_CPUS];
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unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;
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@ -867,7 +867,7 @@ static void mt_ase_fp_affinity(void)
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= current->cpus_allowed;
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cpus_and(tmask, current->cpus_allowed,
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mt_fpu_cpumask);
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set_cpus_allowed(current, tmask);
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set_cpus_allowed_ptr(current, &tmask);
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set_thread_flag(TIF_FPUBOUND);
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}
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}
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