Merge branches 'msm/dt', 'imx/dt' and 'at91/dt' into next/dt
This commit is contained in:
Arnd Bergmann
119
arch/arm/boot/dts/at91sam9g20.dtsi
Normal file
119
arch/arm/boot/dts/at91sam9g20.dtsi
Normal file
@@ -0,0 +1,119 @@
|
||||
/*
|
||||
* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
|
||||
* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G20 family SoC";
|
||||
compatible = "atmel,at91sam9g20";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
serial5 = &usart4;
|
||||
serial6 = &usart5;
|
||||
};
|
||||
cpus {
|
||||
cpu@0 {
|
||||
compatible = "arm,arm926ejs";
|
||||
};
|
||||
};
|
||||
|
||||
memory@20000000 {
|
||||
reg = <0x20000000 0x08000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb0000 0x200>;
|
||||
interrupts = <6>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb4000 0x200>;
|
||||
interrupts = <7>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb8000 0x200>;
|
||||
interrupts = <8>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fffd0000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd0000 0x200>;
|
||||
interrupts = <23>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart4: serial@fffd4000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd4000 0x200>;
|
||||
interrupts = <24>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart5: serial@fffd8000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffd8000 0x200>;
|
||||
interrupts = <25>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
106
arch/arm/boot/dts/at91sam9g45.dtsi
Normal file
106
arch/arm/boot/dts/at91sam9g45.dtsi
Normal file
@@ -0,0 +1,106 @@
|
||||
/*
|
||||
* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
|
||||
* applies to AT91SAM9G45, AT91SAM9M10,
|
||||
* AT91SAM9G46, AT91SAM9M11 SoC
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9G45 family SoC";
|
||||
compatible = "atmel,at91sam9g45";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
};
|
||||
cpus {
|
||||
cpu@0 {
|
||||
compatible = "arm,arm926ejs";
|
||||
};
|
||||
};
|
||||
|
||||
memory@70000000 {
|
||||
reg = <0x70000000 0x10000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
interrupt-parent;
|
||||
reg = <0xfffff000 0x200>;
|
||||
};
|
||||
|
||||
dma: dma-controller@ffffec00 {
|
||||
compatible = "atmel,at91sam9g45-dma";
|
||||
reg = <0xffffec00 0x200>;
|
||||
interrupts = <21>;
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xffffee00 0x200>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fff8c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff8c000 0x200>;
|
||||
interrupts = <7>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff90000 0x200>;
|
||||
interrupts = <8>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fff94000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff94000 0x200>;
|
||||
interrupts = <9>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fff98000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfff98000 0x200>;
|
||||
interrupts = <10>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
35
arch/arm/boot/dts/at91sam9m10g45ek.dts
Normal file
35
arch/arm/boot/dts/at91sam9m10g45ek.dts
Normal file
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
|
||||
*
|
||||
* Copyright (C) 2011 Atmel,
|
||||
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9g45.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9M10G45-EK";
|
||||
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2";
|
||||
};
|
||||
|
||||
memory@70000000 {
|
||||
reg = <0x70000000 0x4000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@ffffee00 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart1: serial@fff90000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
135
arch/arm/boot/dts/imx51-babbage.dts
Normal file
135
arch/arm/boot/dts/imx51-babbage.dts
Normal file
@@ -0,0 +1,135 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "imx51.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX51 Babbage Board";
|
||||
compatible = "fsl,imx51-babbage", "fsl,imx51";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x90000000 0x20000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
aips@70000000 { /* aips-1 */
|
||||
spba@70000000 {
|
||||
esdhc@70004000 { /* ESDHC1 */
|
||||
fsl,cd-internal;
|
||||
fsl,wp-internal;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
esdhc@70008000 { /* ESDHC2 */
|
||||
cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
|
||||
wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart2: uart@7000c000 { /* UART3 */
|
||||
fsl,uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ecspi@70010000 { /* ECSPI1 */
|
||||
fsl,spi-num-chipselects = <2>;
|
||||
cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
|
||||
<&gpio3 25 0>; /* GPIO4_25 */
|
||||
status = "okay";
|
||||
|
||||
pmic: mc13892@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mc13892";
|
||||
spi-max-frequency = <6000000>;
|
||||
reg = <0>;
|
||||
mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */
|
||||
fsl,mc13xxx-uses-regulator;
|
||||
};
|
||||
|
||||
flash: at45db321d@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <25000000>;
|
||||
reg = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "Kernel";
|
||||
reg = <0x40000 0x3c0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wdog@73f98000 { /* WDOG1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
iomuxc@73fa8000 {
|
||||
compatible = "fsl,imx51-iomuxc-babbage";
|
||||
reg = <0x73fa8000 0x4000>;
|
||||
};
|
||||
|
||||
uart0: uart@73fbc000 {
|
||||
fsl,uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart1: uart@73fc0000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
aips@80000000 { /* aips-2 */
|
||||
sdma@83fb0000 {
|
||||
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
|
||||
};
|
||||
|
||||
i2c@83fc4000 { /* I2C2 */
|
||||
status = "okay";
|
||||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
};
|
||||
};
|
||||
|
||||
fec@83fec000 {
|
||||
phy-mode = "mii";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
power {
|
||||
label = "Power Button";
|
||||
gpios = <&gpio1 21 0>;
|
||||
linux,code = <116>; /* KEY_POWER */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
||||
246
arch/arm/boot/dts/imx51.dtsi
Normal file
246
arch/arm/boot/dts/imx51.dtsi
Normal file
@@ -0,0 +1,246 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
};
|
||||
|
||||
tzic: tz-interrupt-controller@e0000000 {
|
||||
compatible = "fsl,imx51-tzic", "fsl,tzic";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0xe0000000 0x4000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ckil {
|
||||
compatible = "fsl,imx-ckil", "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
ckih1 {
|
||||
compatible = "fsl,imx-ckih1", "fixed-clock";
|
||||
clock-frequency = <22579200>;
|
||||
};
|
||||
|
||||
ckih2 {
|
||||
compatible = "fsl,imx-ckih2", "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
osc {
|
||||
compatible = "fsl,imx-osc", "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&tzic>;
|
||||
ranges;
|
||||
|
||||
aips@70000000 { /* AIPS1 */
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x70000000 0x10000000>;
|
||||
ranges;
|
||||
|
||||
spba@70000000 {
|
||||
compatible = "fsl,spba-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x70000000 0x40000>;
|
||||
ranges;
|
||||
|
||||
esdhc@70004000 { /* ESDHC1 */
|
||||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70004000 0x4000>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc@70008000 { /* ESDHC2 */
|
||||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70008000 0x4000>;
|
||||
interrupts = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@7000c000 { /* UART3 */
|
||||
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
||||
reg = <0x7000c000 0x4000>;
|
||||
interrupts = <33>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecspi@70010000 { /* ECSPI1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-ecspi";
|
||||
reg = <0x70010000 0x4000>;
|
||||
interrupts = <36>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc@70020000 { /* ESDHC3 */
|
||||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70020000 0x4000>;
|
||||
interrupts = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc@70024000 { /* ESDHC4 */
|
||||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70024000 0x4000>;
|
||||
interrupts = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@73f84000 { /* GPIO1 */
|
||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x73f84000 0x4000>;
|
||||
interrupts = <50 51>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio1: gpio@73f88000 { /* GPIO2 */
|
||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x73f88000 0x4000>;
|
||||
interrupts = <52 53>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio2: gpio@73f8c000 { /* GPIO3 */
|
||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x73f8c000 0x4000>;
|
||||
interrupts = <54 55>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio3: gpio@73f90000 { /* GPIO4 */
|
||||
compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x73f90000 0x4000>;
|
||||
interrupts = <56 57>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
wdog@73f98000 { /* WDOG1 */
|
||||
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x73f98000 0x4000>;
|
||||
interrupts = <58>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wdog@73f9c000 { /* WDOG2 */
|
||||
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x73f9c000 0x4000>;
|
||||
interrupts = <59>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: uart@73fbc000 {
|
||||
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
||||
reg = <0x73fbc000 0x4000>;
|
||||
interrupts = <31>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@73fc0000 {
|
||||
compatible = "fsl,imx51-uart", "fsl,imx21-uart";
|
||||
reg = <0x73fc0000 0x4000>;
|
||||
interrupts = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
aips@80000000 { /* AIPS2 */
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x80000000 0x10000000>;
|
||||
ranges;
|
||||
|
||||
ecspi@83fac000 { /* ECSPI2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-ecspi";
|
||||
reg = <0x83fac000 0x4000>;
|
||||
interrupts = <37>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdma@83fb0000 {
|
||||
compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
|
||||
reg = <0x83fb0000 0x4000>;
|
||||
interrupts = <6>;
|
||||
};
|
||||
|
||||
cspi@83fc0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
|
||||
reg = <0x83fc0000 0x4000>;
|
||||
interrupts = <38>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@83fc4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
|
||||
reg = <0x83fc4000 0x4000>;
|
||||
interrupts = <63>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@83fc8000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
|
||||
reg = <0x83fc8000 0x4000>;
|
||||
interrupts = <62>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fec@83fec000 {
|
||||
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
|
||||
reg = <0x83fec000 0x4000>;
|
||||
interrupts = <87>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
113
arch/arm/boot/dts/imx53-ard.dts
Normal file
113
arch/arm/boot/dts/imx53-ard.dts
Normal file
@@ -0,0 +1,113 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "imx53.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX53 Automotive Reference Design Board";
|
||||
compatible = "fsl,imx53-ard", "fsl,imx53";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x40000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
aips@50000000 { /* AIPS1 */
|
||||
spba@50000000 {
|
||||
esdhc@50004000 { /* ESDHC1 */
|
||||
cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */
|
||||
wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
wdog@53f98000 { /* WDOG1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
iomuxc@53fa8000 {
|
||||
compatible = "fsl,imx53-iomuxc-ard";
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
};
|
||||
|
||||
uart0: uart@53fbc000 { /* UART1 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
aips@60000000 { /* AIPS2 */
|
||||
sdma@63fb0000 {
|
||||
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
eim-cs1@f4000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,eim-bus", "simple-bus";
|
||||
reg = <0xf4000000 0x3ff0000>;
|
||||
ranges;
|
||||
|
||||
lan9220@f4000000 {
|
||||
compatible = "smsc,lan9220", "smsc,lan9115";
|
||||
reg = <0xf4000000 0x2000000>;
|
||||
phy-mode = "mii";
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <31>;
|
||||
reg-io-width = <4>;
|
||||
smsc,irq-push-pull;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
home {
|
||||
label = "Home";
|
||||
gpios = <&gpio4 10 0>; /* GPIO5_10 */
|
||||
linux,code = <102>; /* KEY_HOME */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
back {
|
||||
label = "Back";
|
||||
gpios = <&gpio4 11 0>; /* GPIO5_11 */
|
||||
linux,code = <158>; /* KEY_BACK */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
program {
|
||||
label = "Program";
|
||||
gpios = <&gpio4 12 0>; /* GPIO5_12 */
|
||||
linux,code = <362>; /* KEY_PROGRAM */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
volume-up {
|
||||
label = "Volume Up";
|
||||
gpios = <&gpio4 13 0>; /* GPIO5_13 */
|
||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||
};
|
||||
|
||||
volume-down {
|
||||
label = "Volume Down";
|
||||
gpios = <&gpio3 0 0>; /* GPIO4_0 */
|
||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||
};
|
||||
};
|
||||
};
|
||||
120
arch/arm/boot/dts/imx53-evk.dts
Normal file
120
arch/arm/boot/dts/imx53-evk.dts
Normal file
@@ -0,0 +1,120 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "imx53.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX53 Evaluation Kit";
|
||||
compatible = "fsl,imx53-evk", "fsl,imx53";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x80000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
aips@50000000 { /* AIPS1 */
|
||||
spba@50000000 {
|
||||
esdhc@50004000 { /* ESDHC1 */
|
||||
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
|
||||
wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ecspi@50010000 { /* ECSPI1 */
|
||||
fsl,spi-num-chipselects = <2>;
|
||||
cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
|
||||
<&gpio2 19 0>; /* GPIO3_19 */
|
||||
status = "okay";
|
||||
|
||||
flash: at45db321d@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <25000000>;
|
||||
reg = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "Kernel";
|
||||
reg = <0x40000 0x3c0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
esdhc@50020000 { /* ESDHC3 */
|
||||
cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
|
||||
wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
wdog@53f98000 { /* WDOG1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
iomuxc@53fa8000 {
|
||||
compatible = "fsl,imx53-iomuxc-evk";
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
};
|
||||
|
||||
uart0: uart@53fbc000 { /* UART1 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
aips@60000000 { /* AIPS2 */
|
||||
sdma@63fb0000 {
|
||||
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
|
||||
};
|
||||
|
||||
i2c@63fc4000 { /* I2C2 */
|
||||
status = "okay";
|
||||
|
||||
pmic: mc13892@08 {
|
||||
compatible = "fsl,mc13892", "fsl,mc13xxx";
|
||||
reg = <0x08>;
|
||||
};
|
||||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
};
|
||||
};
|
||||
|
||||
fec@63fec000 {
|
||||
phy-mode = "rmii";
|
||||
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
green {
|
||||
label = "Heartbeat";
|
||||
gpios = <&gpio6 7 0>; /* GPIO7_7 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
};
|
||||
125
arch/arm/boot/dts/imx53-qsb.dts
Normal file
125
arch/arm/boot/dts/imx53-qsb.dts
Normal file
@@ -0,0 +1,125 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "imx53.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX53 Quick Start Board";
|
||||
compatible = "fsl,imx53-qsb", "fsl,imx53";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x40000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
aips@50000000 { /* AIPS1 */
|
||||
spba@50000000 {
|
||||
esdhc@50004000 { /* ESDHC1 */
|
||||
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
esdhc@50020000 { /* ESDHC3 */
|
||||
cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
|
||||
wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
wdog@53f98000 { /* WDOG1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
iomuxc@53fa8000 {
|
||||
compatible = "fsl,imx53-iomuxc-qsb";
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
};
|
||||
|
||||
uart0: uart@53fbc000 { /* UART1 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
aips@60000000 { /* AIPS2 */
|
||||
sdma@63fb0000 {
|
||||
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
|
||||
};
|
||||
|
||||
i2c@63fc4000 { /* I2C2 */
|
||||
status = "okay";
|
||||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@63fc8000 { /* I2C1 */
|
||||
status = "okay";
|
||||
|
||||
accelerometer: mma8450@1c {
|
||||
compatible = "fsl,mma8450";
|
||||
reg = <0x1c>;
|
||||
};
|
||||
|
||||
pmic: dialog@48 {
|
||||
compatible = "dialog,da9053", "dialog,da9052";
|
||||
reg = <0x48>;
|
||||
};
|
||||
};
|
||||
|
||||
fec@63fec000 {
|
||||
phy-mode = "rmii";
|
||||
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
power {
|
||||
label = "Power Button";
|
||||
gpios = <&gpio0 8 0>; /* GPIO1_8 */
|
||||
linux,code = <116>; /* KEY_POWER */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
volume-up {
|
||||
label = "Volume Up";
|
||||
gpios = <&gpio1 14 0>; /* GPIO2_14 */
|
||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||
};
|
||||
|
||||
volume-down {
|
||||
label = "Volume Down";
|
||||
gpios = <&gpio1 15 0>; /* GPIO2_15 */
|
||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
user {
|
||||
label = "Heartbeat";
|
||||
gpios = <&gpio6 7 0>; /* GPIO7_7 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
};
|
||||
169
arch/arm/boot/dts/imx53-smd.dts
Normal file
169
arch/arm/boot/dts/imx53-smd.dts
Normal file
@@ -0,0 +1,169 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "imx53.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Freescale i.MX53 Smart Mobile Reference Design Board";
|
||||
compatible = "fsl,imx53-smd", "fsl,imx53";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x70000000 0x40000000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
aips@50000000 { /* AIPS1 */
|
||||
spba@50000000 {
|
||||
esdhc@50004000 { /* ESDHC1 */
|
||||
cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
|
||||
wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
esdhc@50008000 { /* ESDHC2 */
|
||||
fsl,card-wired;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart2: uart@5000c000 { /* UART3 */
|
||||
fsl,uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ecspi@50010000 { /* ECSPI1 */
|
||||
fsl,spi-num-chipselects = <2>;
|
||||
cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
|
||||
<&gpio2 19 0>; /* GPIO3_19 */
|
||||
status = "okay";
|
||||
|
||||
zigbee: mc1323@0 {
|
||||
compatible = "fsl,mc1323";
|
||||
spi-max-frequency = <8000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
flash: m25p32@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "st,m25p32", "st,m25p";
|
||||
spi-max-frequency = <20000000>;
|
||||
reg = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x40000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "Kernel";
|
||||
reg = <0x40000 0x3c0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
esdhc@50020000 { /* ESDHC3 */
|
||||
fsl,card-wired;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
wdog@53f98000 { /* WDOG1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
iomuxc@53fa8000 {
|
||||
compatible = "fsl,imx53-iomuxc-smd";
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
};
|
||||
|
||||
uart0: uart@53fbc000 { /* UART1 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart1: uart@53fc0000 { /* UART2 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
aips@60000000 { /* AIPS2 */
|
||||
sdma@63fb0000 {
|
||||
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
|
||||
};
|
||||
|
||||
i2c@63fc4000 { /* I2C2 */
|
||||
status = "okay";
|
||||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
};
|
||||
|
||||
magnetometer: mag3110@0e {
|
||||
compatible = "fsl,mag3110";
|
||||
reg = <0x0e>;
|
||||
};
|
||||
|
||||
touchkey: mpr121@5a {
|
||||
compatible = "fsl,mpr121";
|
||||
reg = <0x5a>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c@63fc8000 { /* I2C1 */
|
||||
status = "okay";
|
||||
|
||||
accelerometer: mma8450@1c {
|
||||
compatible = "fsl,mma8450";
|
||||
reg = <0x1c>;
|
||||
};
|
||||
|
||||
camera: ov5642@3c {
|
||||
compatible = "ovti,ov5642";
|
||||
reg = <0x3c>;
|
||||
};
|
||||
|
||||
pmic: dialog@48 {
|
||||
compatible = "dialog,da9053", "dialog,da9052";
|
||||
reg = <0x48>;
|
||||
};
|
||||
};
|
||||
|
||||
fec@63fec000 {
|
||||
phy-mode = "rmii";
|
||||
phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
volume-up {
|
||||
label = "Volume Up";
|
||||
gpios = <&gpio1 14 0>; /* GPIO2_14 */
|
||||
linux,code = <115>; /* KEY_VOLUMEUP */
|
||||
};
|
||||
|
||||
volume-down {
|
||||
label = "Volume Down";
|
||||
gpios = <&gpio1 15 0>; /* GPIO2_15 */
|
||||
linux,code = <114>; /* KEY_VOLUMEDOWN */
|
||||
};
|
||||
};
|
||||
};
|
||||
301
arch/arm/boot/dts/imx53.dtsi
Normal file
301
arch/arm/boot/dts/imx53.dtsi
Normal file
@@ -0,0 +1,301 @@
|
||||
/*
|
||||
* Copyright 2011 Freescale Semiconductor, Inc.
|
||||
* Copyright 2011 Linaro Ltd.
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
serial3 = &uart3;
|
||||
serial4 = &uart4;
|
||||
};
|
||||
|
||||
tzic: tz-interrupt-controller@0fffc000 {
|
||||
compatible = "fsl,imx53-tzic", "fsl,tzic";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x0fffc000 0x4000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ckil {
|
||||
compatible = "fsl,imx-ckil", "fixed-clock";
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
ckih1 {
|
||||
compatible = "fsl,imx-ckih1", "fixed-clock";
|
||||
clock-frequency = <22579200>;
|
||||
};
|
||||
|
||||
ckih2 {
|
||||
compatible = "fsl,imx-ckih2", "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
osc {
|
||||
compatible = "fsl,imx-osc", "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&tzic>;
|
||||
ranges;
|
||||
|
||||
aips@50000000 { /* AIPS1 */
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x50000000 0x10000000>;
|
||||
ranges;
|
||||
|
||||
spba@50000000 {
|
||||
compatible = "fsl,spba-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x50000000 0x40000>;
|
||||
ranges;
|
||||
|
||||
esdhc@50004000 { /* ESDHC1 */
|
||||
compatible = "fsl,imx53-esdhc";
|
||||
reg = <0x50004000 0x4000>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc@50008000 { /* ESDHC2 */
|
||||
compatible = "fsl,imx53-esdhc";
|
||||
reg = <0x50008000 0x4000>;
|
||||
interrupts = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@5000c000 { /* UART3 */
|
||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||
reg = <0x5000c000 0x4000>;
|
||||
interrupts = <33>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecspi@50010000 { /* ECSPI1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
|
||||
reg = <0x50010000 0x4000>;
|
||||
interrupts = <36>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc@50020000 { /* ESDHC3 */
|
||||
compatible = "fsl,imx53-esdhc";
|
||||
reg = <0x50020000 0x4000>;
|
||||
interrupts = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc@50024000 { /* ESDHC4 */
|
||||
compatible = "fsl,imx53-esdhc";
|
||||
reg = <0x50024000 0x4000>;
|
||||
interrupts = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
gpio0: gpio@53f84000 { /* GPIO1 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53f84000 0x4000>;
|
||||
interrupts = <50 51>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio1: gpio@53f88000 { /* GPIO2 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53f88000 0x4000>;
|
||||
interrupts = <52 53>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio2: gpio@53f8c000 { /* GPIO3 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53f8c000 0x4000>;
|
||||
interrupts = <54 55>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio3: gpio@53f90000 { /* GPIO4 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53f90000 0x4000>;
|
||||
interrupts = <56 57>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
wdog@53f98000 { /* WDOG1 */
|
||||
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x53f98000 0x4000>;
|
||||
interrupts = <58>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wdog@53f9c000 { /* WDOG2 */
|
||||
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x53f9c000 0x4000>;
|
||||
interrupts = <59>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: uart@53fbc000 { /* UART1 */
|
||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||
reg = <0x53fbc000 0x4000>;
|
||||
interrupts = <31>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@53fc0000 { /* UART2 */
|
||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||
reg = <0x53fc0000 0x4000>;
|
||||
interrupts = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio4: gpio@53fdc000 { /* GPIO5 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53fdc000 0x4000>;
|
||||
interrupts = <103 104>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio5: gpio@53fe0000 { /* GPIO6 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53fe0000 0x4000>;
|
||||
interrupts = <105 106>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
gpio6: gpio@53fe4000 { /* GPIO7 */
|
||||
compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
|
||||
reg = <0x53fe4000 0x4000>;
|
||||
interrupts = <107 108>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
i2c@53fec000 { /* I2C3 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
reg = <0x53fec000 0x4000>;
|
||||
interrupts = <64>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: uart@53ff0000 { /* UART4 */
|
||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||
reg = <0x53ff0000 0x4000>;
|
||||
interrupts = <13>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
aips@60000000 { /* AIPS2 */
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x60000000 0x10000000>;
|
||||
ranges;
|
||||
|
||||
uart4: uart@63f90000 { /* UART5 */
|
||||
compatible = "fsl,imx53-uart", "fsl,imx21-uart";
|
||||
reg = <0x63f90000 0x4000>;
|
||||
interrupts = <86>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecspi@63fac000 { /* ECSPI2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
|
||||
reg = <0x63fac000 0x4000>;
|
||||
interrupts = <37>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdma@63fb0000 {
|
||||
compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
|
||||
reg = <0x63fb0000 0x4000>;
|
||||
interrupts = <6>;
|
||||
};
|
||||
|
||||
cspi@63fc0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
|
||||
reg = <0x63fc0000 0x4000>;
|
||||
interrupts = <38>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@63fc4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
reg = <0x63fc4000 0x4000>;
|
||||
interrupts = <63>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@63fc8000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
reg = <0x63fc8000 0x4000>;
|
||||
interrupts = <62>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fec@63fec000 {
|
||||
compatible = "fsl,imx53-fec", "fsl,imx25-fec";
|
||||
reg = <0x63fec000 0x4000>;
|
||||
interrupts = <87>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -57,14 +57,14 @@
|
||||
};
|
||||
|
||||
sdhci@c8000200 {
|
||||
gpios = <&gpio 69 0>, /* cd, gpio PI5 */
|
||||
<&gpio 57 0>, /* wp, gpio PH1 */
|
||||
<&gpio 155 0>; /* power, gpio PT3 */
|
||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
||||
};
|
||||
|
||||
sdhci@c8000600 {
|
||||
gpios = <&gpio 58 0>, /* cd, gpio PH2 */
|
||||
<&gpio 59 0>, /* wp, gpio PH3 */
|
||||
<&gpio 70 0>; /* power, gpio PI6 */
|
||||
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
|
||||
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
|
||||
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
||||
};
|
||||
};
|
||||
|
||||
@@ -21,8 +21,8 @@
|
||||
};
|
||||
|
||||
sdhci@c8000400 {
|
||||
gpios = <&gpio 69 0>, /* cd, gpio PI5 */
|
||||
<&gpio 57 0>, /* wp, gpio PH1 */
|
||||
<&gpio 70 0>; /* power, gpio PI6 */
|
||||
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
||||
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
||||
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
||||
};
|
||||
};
|
||||
|
||||
30
arch/arm/boot/dts/usb_a9g20.dts
Normal file
30
arch/arm/boot/dts/usb_a9g20.dts
Normal file
@@ -0,0 +1,30 @@
|
||||
/*
|
||||
* usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board
|
||||
*
|
||||
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
/dts-v1/;
|
||||
/include/ "at91sam9g20.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Calao USB A9G20";
|
||||
compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
|
||||
};
|
||||
|
||||
memory@20000000 {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
apb {
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user