Blackfin: ints-priority: unify duplicate vec to irq lookup logic
Seems the ipipe code just copied & pasted the existing irq lookup logic, so pull the logic out of do_irq() and into a local helper, and convert the two users over to that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
@@ -1301,53 +1301,57 @@ int __init init_arch_irq(void)
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_DO_IRQ_L1
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__attribute__((l1_text))
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#endif
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static int vec_to_irq(int vec)
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{
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struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
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struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
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unsigned long sic_status[3];
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if (likely(vec == EVT_IVTMR_P))
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return IRQ_CORETMR;
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#ifdef SIC_ISR
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sic_status[0] = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
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#else
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if (smp_processor_id()) {
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# ifdef SICB_ISR0
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/* This will be optimized out in UP mode. */
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sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0();
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sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1();
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# endif
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} else {
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sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
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sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
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}
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#endif
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#ifdef SIC_ISR2
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sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
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#endif
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for (;; ivg++) {
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if (ivg >= ivg_stop)
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return -1;
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#ifdef SIC_ISR
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if (sic_status[0] & ivg->isrflag)
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#else
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if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag)
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#endif
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return ivg->irqno;
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}
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}
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#ifdef CONFIG_DO_IRQ_L1
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#ifdef CONFIG_DO_IRQ_L1
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__attribute__((l1_text))
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__attribute__((l1_text))
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#endif
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#endif
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void do_irq(int vec, struct pt_regs *fp)
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void do_irq(int vec, struct pt_regs *fp)
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{
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{
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if (vec == EVT_IVTMR_P) {
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int irq = vec_to_irq(vec);
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vec = IRQ_CORETMR;
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if (irq == -1)
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} else {
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return;
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struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
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asm_do_IRQ(irq, fp);
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struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
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#if defined(SIC_ISR0)
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unsigned long sic_status[3];
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if (smp_processor_id()) {
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# ifdef SICB_ISR0
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/* This will be optimized out in UP mode. */
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sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0();
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sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1();
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# endif
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} else {
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sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
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sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
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}
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# ifdef SIC_ISR2
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sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
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# endif
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for (;; ivg++) {
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if (ivg >= ivg_stop)
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return;
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if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag)
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break;
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}
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#else
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unsigned long sic_status;
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sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
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for (;; ivg++) {
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if (ivg >= ivg_stop)
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return;
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if (sic_status & ivg->isrflag)
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break;
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}
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#endif
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vec = ivg->irqno;
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}
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asm_do_IRQ(vec, fp);
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}
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}
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#ifdef CONFIG_IPIPE
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#ifdef CONFIG_IPIPE
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@@ -1385,37 +1389,9 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
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struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
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struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
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int irq, s = 0;
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int irq, s = 0;
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if (likely(vec == EVT_IVTMR_P))
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irq = vec_to_irq(vec);
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irq = IRQ_CORETMR;
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if (irq == -1)
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else {
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return 0;
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#if defined(SIC_ISR0)
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unsigned long sic_status[3];
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sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
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sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
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# ifdef SIC_ISR2
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sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
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# endif
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for (;; ivg++) {
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if (ivg >= ivg_stop)
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return 0;
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if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag)
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break;
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}
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#else
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unsigned long sic_status;
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sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
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for (;; ivg++) {
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if (ivg >= ivg_stop)
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return 0;
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if (sic_status & ivg->isrflag)
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break;
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}
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#endif
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irq = ivg->irqno;
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}
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if (irq == IRQ_SYSTMR) {
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if (irq == IRQ_SYSTMR) {
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#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_TICKSOURCE_GPTMR0)
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#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || defined(CONFIG_TICKSOURCE_GPTMR0)
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