[SPARC64]: Do not assume sun4v chips have load-twin/store-init support.
Check the cpu type in the OBP device tree before committing to using the optimized Niagara memcpy and memset implementation. If we don't recognize the cpu type, use a completely generic version. Signed-off-by: David S. Miller <davem@davemloft.net>
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38
arch/sparc64/lib/GENcopy_to_user.S
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38
arch/sparc64/lib/GENcopy_to_user.S
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/* GENcopy_to_user.S: Generic sparc64 copy to userspace.
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*
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* Copyright (C) 2007 David S. Miller (davem@davemloft.net)
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*/
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#define EX_ST(x) \
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98: x; \
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.section .fixup; \
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.align 4; \
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99: retl; \
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mov 1, %o0; \
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.section __ex_table,"a";\
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.align 4; \
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.word 98b, 99b; \
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.text; \
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.align 4;
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#ifndef ASI_AIUS
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#define ASI_AIUS 0x11
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#endif
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#define FUNC_NAME GENcopy_to_user
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#define STORE(type,src,addr) type##a src, [addr] ASI_AIUS
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#define EX_RETVAL(x) 0
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#ifdef __KERNEL__
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/* Writing to %asi is _expensive_ so we hardcode it.
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* Reading %asi to check for KERNEL_DS is comparatively
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* cheap.
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*/
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#define PREAMBLE \
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rd %asi, %g1; \
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cmp %g1, ASI_AIUS; \
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bne,pn %icc, memcpy_user_stub; \
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nop
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#endif
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#include "GENmemcpy.S"
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