Merge branch 'core/percpu' into percpu-cpumask-x86-for-linus-2
Conflicts: arch/parisc/kernel/irq.c arch/x86/include/asm/fixmap_64.h arch/x86/include/asm/setup.h kernel/irq/handle.c Semantic merge: arch/x86/include/asm/fixmap.h Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
@@ -74,14 +74,15 @@
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#include <asm/e820.h>
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#include <asm/mpspec.h>
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#include <asm/setup.h>
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#include <asm/arch_hooks.h>
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#include <asm/efi.h>
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#include <asm/timer.h>
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#include <asm/i8259.h>
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#include <asm/sections.h>
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#include <asm/dmi.h>
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#include <asm/io_apic.h>
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#include <asm/ist.h>
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#include <asm/vmi.h>
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#include <setup_arch.h>
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#include <asm/setup_arch.h>
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#include <asm/bios_ebda.h>
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#include <asm/cacheflush.h>
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#include <asm/processor.h>
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@@ -89,7 +90,7 @@
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#include <asm/system.h>
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#include <asm/vsyscall.h>
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#include <asm/smp.h>
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#include <asm/cpu.h>
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#include <asm/desc.h>
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#include <asm/dma.h>
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#include <asm/iommu.h>
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@@ -97,7 +98,6 @@
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#include <asm/mmu_context.h>
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#include <asm/proto.h>
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#include <mach_apic.h>
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#include <asm/paravirt.h>
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#include <asm/hypervisor.h>
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@@ -112,6 +112,20 @@
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#define ARCH_SETUP
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#endif
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unsigned int boot_cpu_id __read_mostly;
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#ifdef CONFIG_X86_64
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int default_cpu_present_to_apicid(int mps_cpu)
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{
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return __default_cpu_present_to_apicid(mps_cpu);
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}
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int default_check_phys_apicid_present(int boot_cpu_physical_apicid)
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{
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return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
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}
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#endif
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#ifndef CONFIG_DEBUG_BOOT_PARAMS
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struct boot_params __initdata boot_params;
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#else
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@@ -586,20 +600,7 @@ static int __init setup_elfcorehdr(char *arg)
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early_param("elfcorehdr", setup_elfcorehdr);
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#endif
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static int __init default_update_genapic(void)
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{
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#ifdef CONFIG_X86_SMP
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# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
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genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
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# endif
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#endif
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return 0;
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}
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static struct x86_quirks default_x86_quirks __initdata = {
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.update_genapic = default_update_genapic,
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};
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static struct x86_quirks default_x86_quirks __initdata;
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struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
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@@ -656,7 +657,6 @@ void __init setup_arch(char **cmdline_p)
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#ifdef CONFIG_X86_32
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memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
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visws_early_detect();
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pre_setup_arch_hook();
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#else
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printk(KERN_INFO "Command line: %s\n", boot_command_line);
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#endif
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@@ -824,8 +824,7 @@ void __init setup_arch(char **cmdline_p)
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#else
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num_physpages = max_pfn;
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if (cpu_has_x2apic)
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check_x2apic();
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check_x2apic();
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/* How many end-of-memory variables you have, grandma! */
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/* need this before calling reserve_initrd */
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@@ -865,9 +864,7 @@ void __init setup_arch(char **cmdline_p)
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reserve_initrd();
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#ifdef CONFIG_X86_64
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vsmp_init();
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#endif
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io_delay_init();
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@@ -893,12 +890,11 @@ void __init setup_arch(char **cmdline_p)
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*/
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acpi_reserve_bootmem();
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#endif
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#ifdef CONFIG_X86_FIND_SMP_CONFIG
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/*
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* Find and reserve possible boot-time SMP configuration:
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*/
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find_smp_config();
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#endif
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reserve_crashkernel();
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#ifdef CONFIG_X86_64
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@@ -925,9 +921,7 @@ void __init setup_arch(char **cmdline_p)
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map_vsyscall();
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#endif
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#ifdef CONFIG_X86_GENERICARCH
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generic_apic_probe();
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#endif
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early_quirks();
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@@ -978,4 +972,95 @@ void __init setup_arch(char **cmdline_p)
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#endif
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}
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#ifdef CONFIG_X86_32
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/**
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* x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
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*
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* Description:
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* Perform any necessary interrupt initialisation prior to setting up
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* the "ordinary" interrupt call gates. For legacy reasons, the ISA
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* interrupts should be initialised here if the machine emulates a PC
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* in any way.
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**/
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void __init x86_quirk_pre_intr_init(void)
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{
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if (x86_quirks->arch_pre_intr_init) {
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if (x86_quirks->arch_pre_intr_init())
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return;
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}
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init_ISA_irqs();
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}
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/**
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* x86_quirk_intr_init - post gate setup interrupt initialisation
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*
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* Description:
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* Fill in any interrupts that may have been left out by the general
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* init_IRQ() routine. interrupts having to do with the machine rather
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* than the devices on the I/O bus (like APIC interrupts in intel MP
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* systems) are started here.
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**/
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void __init x86_quirk_intr_init(void)
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{
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if (x86_quirks->arch_intr_init) {
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if (x86_quirks->arch_intr_init())
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return;
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}
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}
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/**
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* x86_quirk_trap_init - initialise system specific traps
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*
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* Description:
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* Called as the final act of trap_init(). Used in VISWS to initialise
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* the various board specific APIC traps.
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**/
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void __init x86_quirk_trap_init(void)
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{
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if (x86_quirks->arch_trap_init) {
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if (x86_quirks->arch_trap_init())
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return;
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}
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
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.mask = CPU_MASK_NONE,
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.name = "timer"
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};
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/**
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* x86_quirk_pre_time_init - do any specific initialisations before.
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*
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**/
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void __init x86_quirk_pre_time_init(void)
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{
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if (x86_quirks->arch_pre_time_init)
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x86_quirks->arch_pre_time_init();
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}
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/**
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* x86_quirk_time_init - do any specific initialisations for the system timer.
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*
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* Description:
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* Must plug the system timer interrupt source at HZ into the IRQ listed
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* in irq_vectors.h:TIMER_IRQ
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**/
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void __init x86_quirk_time_init(void)
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{
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if (x86_quirks->arch_time_init) {
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/*
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* A nonzero return code does not mean failure, it means
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* that the architecture quirk does not want any
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* generic (timer) setup to be performed after this:
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*/
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if (x86_quirks->arch_time_init())
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return;
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}
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irq0.mask = cpumask_of_cpu(0);
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setup_irq(0, &irq0);
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}
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#endif /* CONFIG_X86_32 */
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