MIPS: Give Octeon+ CPUs their own cputype.
This allows us to treat them differently at runtime. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/951/ Patchwork: http://patchwork.linux-mips.org/patch/987/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
committed by
Ralf Baechle
parent
6dd9344cfc
commit
6f329468f3
@@ -162,6 +162,7 @@ void __init check_wait(void)
|
||||
case CPU_BCM6348:
|
||||
case CPU_BCM6358:
|
||||
case CPU_CAVIUM_OCTEON:
|
||||
case CPU_CAVIUM_OCTEON_PLUS:
|
||||
cpu_wait = r4k_wait;
|
||||
break;
|
||||
|
||||
@@ -911,12 +912,16 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
|
||||
case PRID_IMP_CAVIUM_CN38XX:
|
||||
case PRID_IMP_CAVIUM_CN31XX:
|
||||
case PRID_IMP_CAVIUM_CN30XX:
|
||||
c->cputype = CPU_CAVIUM_OCTEON;
|
||||
__cpu_name[cpu] = "Cavium Octeon";
|
||||
goto platform;
|
||||
case PRID_IMP_CAVIUM_CN58XX:
|
||||
case PRID_IMP_CAVIUM_CN56XX:
|
||||
case PRID_IMP_CAVIUM_CN50XX:
|
||||
case PRID_IMP_CAVIUM_CN52XX:
|
||||
c->cputype = CPU_CAVIUM_OCTEON;
|
||||
__cpu_name[cpu] = "Cavium Octeon";
|
||||
c->cputype = CPU_CAVIUM_OCTEON_PLUS;
|
||||
__cpu_name[cpu] = "Cavium Octeon+";
|
||||
platform:
|
||||
if (cpu == 0)
|
||||
__elf_platform = "octeon";
|
||||
break;
|
||||
|
Reference in New Issue
Block a user