[PATCH] patch 1/8] pciehp: use the PCI core for hotplug resource management
This patch converts the pci express hotplug controller driver to use the PCI core for resource management. This eliminates a lot of duplicated code and integrates pciehp with the system's normal PCI handling code. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
rajesh.shah@intel.com
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
24a4e37706
commit
71b720c0f9
@ -37,47 +37,70 @@
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#include <linux/pci.h>
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#include "../pci.h"
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#include "pciehp.h"
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#ifndef CONFIG_IA64
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#include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependant we are... */
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#endif
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int pciehp_configure_device (struct controller* ctrl, struct pci_func* func)
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int pciehp_configure_device(struct slot *p_slot)
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{
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unsigned char bus;
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struct pci_bus *child;
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int num;
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struct pci_dev *dev;
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struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;
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int num, fn;
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if (func->pci_dev == NULL)
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func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
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dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));
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if (dev) {
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err("Device %s already exists at %x:%x, cannot hot-add\n",
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pci_name(dev), p_slot->bus, p_slot->device);
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return -EINVAL;
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}
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/* Still NULL ? Well then scan for it ! */
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if (func->pci_dev == NULL) {
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dbg("%s: pci_dev still null. do pci_scan_slot\n", __FUNCTION__);
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num = pci_scan_slot(parent, PCI_DEVFN(p_slot->device, 0));
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if (num == 0) {
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err("No new device found\n");
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return -ENODEV;
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}
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num = pci_scan_slot(ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function));
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if (num)
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pci_bus_add_devices(ctrl->pci_dev->subordinate);
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func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
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if (func->pci_dev == NULL) {
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dbg("ERROR: pci_dev still null\n");
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return 0;
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for (fn = 0; fn < 8; fn++) {
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if (!(dev = pci_find_slot(p_slot->bus,
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PCI_DEVFN(p_slot->device, fn))))
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continue;
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if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
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err("Cannot hot-add display device %s\n",
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pci_name(dev));
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continue;
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}
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if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||
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(dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
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/* Find an unused bus number for the new bridge */
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struct pci_bus *child;
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unsigned char busnr, start = parent->secondary;
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unsigned char end = parent->subordinate;
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for (busnr = start; busnr <= end; busnr++) {
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if (!pci_find_bus(pci_domain_nr(parent),
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busnr))
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break;
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}
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if (busnr >= end) {
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err("No free bus for hot-added bridge\n");
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continue;
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}
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child = pci_add_new_bus(parent, dev, busnr);
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if (!child) {
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err("Cannot add new bus for %s\n",
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pci_name(dev));
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continue;
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}
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child->subordinate = pci_do_scan_bus(child);
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pci_bus_size_bridges(child);
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}
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/* TBD: program firmware provided _HPP values */
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/* program_fw_provided_values(dev); */
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}
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if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
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pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
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child = pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
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pci_do_scan_bus(child);
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}
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pci_bus_assign_resources(parent);
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pci_bus_add_devices(parent);
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pci_enable_bridges(parent);
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return 0;
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}
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int pciehp_unconfigure_device(struct pci_func* func)
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{
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int rc = 0;
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@ -104,47 +127,6 @@ int pciehp_unconfigure_device(struct pci_func* func)
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return rc;
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}
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/*
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* pciehp_set_irq
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*
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* @bus_num: bus number of PCI device
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* @dev_num: device number of PCI device
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* @slot: pointer to u8 where slot number will be returned
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*/
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int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
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{
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#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_IO_APIC)
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int rc;
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u16 temp_word;
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struct pci_dev fakedev;
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struct pci_bus fakebus;
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fakedev.devfn = dev_num << 3;
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fakedev.bus = &fakebus;
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fakebus.number = bus_num;
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dbg("%s: dev %d, bus %d, pin %d, num %d\n",
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__FUNCTION__, dev_num, bus_num, int_pin, irq_num);
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rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
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dbg("%s: rc %d\n", __FUNCTION__, rc);
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if (!rc)
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return !rc;
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/* set the Edge Level Control Register (ELCR) */
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temp_word = inb(0x4d0);
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temp_word |= inb(0x4d1) << 8;
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temp_word |= 0x01 << irq_num;
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/* This should only be for x86 as it sets the Edge Level Control Register */
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outb((u8) (temp_word & 0xFF), 0x4d0);
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outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
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#endif
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return 0;
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}
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/* More PCI configuration routines; this time centered around hotplug controller */
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/*
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* pciehp_save_config
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*
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@ -462,366 +444,3 @@ int pciehp_save_slot_config(struct controller *ctrl, struct pci_func * new_slot)
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return 0;
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}
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/*
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* pciehp_save_used_resources
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*
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* Stores used resource information for existing boards. this is
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* for boards that were in the system when this driver was loaded.
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* this function is for hot plug ADD
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*
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* returns 0 if success
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* if disable == 1(DISABLE_CARD),
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* it loops for all functions of the slot and disables them.
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* else, it just get resources of the function and return.
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*/
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int pciehp_save_used_resources(struct controller *ctrl, struct pci_func *func, int disable)
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{
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u8 cloop;
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u8 header_type;
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u8 secondary_bus;
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u8 temp_byte;
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u16 command;
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u16 save_command;
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u16 w_base, w_length;
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u32 temp_register;
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u32 save_base;
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u32 base, length;
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u64 base64 = 0;
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int index = 0;
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unsigned int devfn;
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struct pci_resource *mem_node = NULL;
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struct pci_resource *p_mem_node = NULL;
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struct pci_resource *t_mem_node;
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struct pci_resource *io_node;
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struct pci_resource *bus_node;
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struct pci_bus lpci_bus, *pci_bus;
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memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
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pci_bus = &lpci_bus;
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if (disable)
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func = pciehp_slot_find(func->bus, func->device, index++);
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while ((func != NULL) && func->is_a_board) {
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pci_bus->number = func->bus;
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devfn = PCI_DEVFN(func->device, func->function);
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/* Save the command register */
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pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
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if (disable) {
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/* disable card */
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command = 0x00;
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pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
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}
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/* Check for Bridge */
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pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
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dbg("Save_used_res of PCI bridge b:d=0x%x:%x, sc=0x%x\n",
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func->bus, func->device, save_command);
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if (disable) {
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/* Clear Bridge Control Register */
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command = 0x00;
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pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
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}
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pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
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pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
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bus_node = kmalloc(sizeof(struct pci_resource),
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GFP_KERNEL);
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if (!bus_node)
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return -ENOMEM;
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bus_node->base = (ulong)secondary_bus;
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bus_node->length = (ulong)(temp_byte - secondary_bus + 1);
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bus_node->next = func->bus_head;
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func->bus_head = bus_node;
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/* Save IO base and Limit registers */
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pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &temp_byte);
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base = temp_byte;
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pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &temp_byte);
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length = temp_byte;
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if ((base <= length) && (!disable || (save_command & PCI_COMMAND_IO))) {
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io_node = kmalloc(sizeof(struct pci_resource),
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GFP_KERNEL);
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if (!io_node)
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return -ENOMEM;
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io_node->base = (ulong)(base & PCI_IO_RANGE_MASK) << 8;
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io_node->length = (ulong)(length - base + 0x10) << 8;
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io_node->next = func->io_head;
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func->io_head = io_node;
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}
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/* Save memory base and Limit registers */
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pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
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pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
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if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
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mem_node = kmalloc(sizeof(struct pci_resource),
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GFP_KERNEL);
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if (!mem_node)
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return -ENOMEM;
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mem_node->base = (ulong)w_base << 16;
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mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
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mem_node->next = func->mem_head;
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func->mem_head = mem_node;
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}
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/* Save prefetchable memory base and Limit registers */
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pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
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pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
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if ((w_base <= w_length) && (!disable || (save_command & PCI_COMMAND_MEMORY))) {
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p_mem_node = kmalloc(sizeof(struct pci_resource),
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GFP_KERNEL);
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if (!p_mem_node)
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return -ENOMEM;
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p_mem_node->base = (ulong)w_base << 16;
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p_mem_node->length = (ulong)(w_length - w_base + 0x10) << 16;
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p_mem_node->next = func->p_mem_head;
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func->p_mem_head = p_mem_node;
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}
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} else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
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dbg("Save_used_res of PCI adapter b:d=0x%x:%x, sc=0x%x\n",
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func->bus, func->device, save_command);
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/* Figure out IO and memory base lengths */
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for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
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pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
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temp_register = 0xFFFFFFFF;
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pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
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pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
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if (!disable)
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pci_bus_write_config_dword(pci_bus, devfn, cloop, save_base);
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if (!temp_register)
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continue;
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base = temp_register;
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if ((base & PCI_BASE_ADDRESS_SPACE_IO) &&
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(!disable || (save_command & PCI_COMMAND_IO))) {
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/* IO base */
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/* set temp_register = amount of IO space requested */
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base = base & 0xFFFFFFFCL;
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base = (~base) + 1;
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io_node = kmalloc(sizeof (struct pci_resource),
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GFP_KERNEL);
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if (!io_node)
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return -ENOMEM;
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io_node->base = (ulong)save_base & PCI_BASE_ADDRESS_IO_MASK;
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io_node->length = (ulong)base;
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dbg("sur adapter: IO bar=0x%x(length=0x%x)\n",
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io_node->base, io_node->length);
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io_node->next = func->io_head;
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func->io_head = io_node;
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} else { /* map Memory */
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int prefetchable = 1;
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/* struct pci_resources **res_node; */
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char *res_type_str = "PMEM";
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u32 temp_register2;
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t_mem_node = kmalloc(sizeof (struct pci_resource),
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GFP_KERNEL);
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if (!t_mem_node)
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return -ENOMEM;
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if (!(base & PCI_BASE_ADDRESS_MEM_PREFETCH) &&
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(!disable || (save_command & PCI_COMMAND_MEMORY))) {
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prefetchable = 0;
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mem_node = t_mem_node;
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res_type_str++;
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} else
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p_mem_node = t_mem_node;
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base = base & 0xFFFFFFF0L;
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base = (~base) + 1;
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switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
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case PCI_BASE_ADDRESS_MEM_TYPE_32:
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if (prefetchable) {
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p_mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
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p_mem_node->length = (ulong)base;
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dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
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res_type_str,
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p_mem_node->base,
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p_mem_node->length);
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p_mem_node->next = func->p_mem_head;
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func->p_mem_head = p_mem_node;
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} else {
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mem_node->base = (ulong)save_base & PCI_BASE_ADDRESS_MEM_MASK;
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mem_node->length = (ulong)base;
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dbg("sur adapter: 32 %s bar=0x%x(length=0x%x)\n",
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res_type_str,
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mem_node->base,
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mem_node->length);
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mem_node->next = func->mem_head;
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func->mem_head = mem_node;
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}
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break;
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case PCI_BASE_ADDRESS_MEM_TYPE_64:
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pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
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base64 = temp_register2;
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base64 = (base64 << 32) | save_base;
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if (temp_register2) {
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dbg("sur adapter: 64 %s high dword of base64(0x%x:%x) masked to 0\n",
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res_type_str, temp_register2, (u32)base64);
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base64 &= 0x00000000FFFFFFFFL;
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}
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if (prefetchable) {
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p_mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
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p_mem_node->length = base;
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dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
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res_type_str,
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p_mem_node->base,
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p_mem_node->length);
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p_mem_node->next = func->p_mem_head;
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func->p_mem_head = p_mem_node;
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} else {
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mem_node->base = base64 & PCI_BASE_ADDRESS_MEM_MASK;
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mem_node->length = base;
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dbg("sur adapter: 64 %s base=0x%x(len=0x%x)\n",
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res_type_str,
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mem_node->base,
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mem_node->length);
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mem_node->next = func->mem_head;
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func->mem_head = mem_node;
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}
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cloop += 4;
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break;
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default:
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dbg("asur: reserved BAR type=0x%x\n",
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temp_register);
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break;
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}
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}
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} /* End of base register loop */
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} else { /* Some other unknown header type */
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dbg("Save_used_res of PCI unknown type b:d=0x%x:%x. skip.\n",
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func->bus, func->device);
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}
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/* find the next device in this slot */
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if (!disable)
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break;
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func = pciehp_slot_find(func->bus, func->device, index++);
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}
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return 0;
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}
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/**
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* kfree_resource_list: release memory of all list members
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* @res: resource list to free
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*/
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static inline void
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return_resource_list(struct pci_resource **func, struct pci_resource **res)
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{
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struct pci_resource *node;
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struct pci_resource *t_node;
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node = *func;
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*func = NULL;
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while (node) {
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t_node = node->next;
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return_resource(res, node);
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node = t_node;
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}
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}
|
||||
|
||||
/*
|
||||
* pciehp_return_board_resources
|
||||
*
|
||||
* this routine returns all resources allocated to a board to
|
||||
* the available pool.
|
||||
*
|
||||
* returns 0 if success
|
||||
*/
|
||||
int pciehp_return_board_resources(struct pci_func * func,
|
||||
struct resource_lists * resources)
|
||||
{
|
||||
int rc;
|
||||
|
||||
dbg("%s\n", __FUNCTION__);
|
||||
|
||||
if (!func)
|
||||
return 1;
|
||||
|
||||
return_resource_list(&(func->io_head),&(resources->io_head));
|
||||
return_resource_list(&(func->mem_head),&(resources->mem_head));
|
||||
return_resource_list(&(func->p_mem_head),&(resources->p_mem_head));
|
||||
return_resource_list(&(func->bus_head),&(resources->bus_head));
|
||||
|
||||
rc = pciehp_resource_sort_and_combine(&(resources->mem_head));
|
||||
rc |= pciehp_resource_sort_and_combine(&(resources->p_mem_head));
|
||||
rc |= pciehp_resource_sort_and_combine(&(resources->io_head));
|
||||
rc |= pciehp_resource_sort_and_combine(&(resources->bus_head));
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/**
|
||||
* kfree_resource_list: release memory of all list members
|
||||
* @res: resource list to free
|
||||
*/
|
||||
static inline void
|
||||
kfree_resource_list(struct pci_resource **r)
|
||||
{
|
||||
struct pci_resource *res, *tres;
|
||||
|
||||
res = *r;
|
||||
*r = NULL;
|
||||
|
||||
while (res) {
|
||||
tres = res;
|
||||
res = res->next;
|
||||
kfree(tres);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* pciehp_destroy_resource_list: put node back in the resource list
|
||||
* @resources: list to put nodes back
|
||||
*/
|
||||
void pciehp_destroy_resource_list(struct resource_lists * resources)
|
||||
{
|
||||
kfree_resource_list(&(resources->io_head));
|
||||
kfree_resource_list(&(resources->mem_head));
|
||||
kfree_resource_list(&(resources->p_mem_head));
|
||||
kfree_resource_list(&(resources->bus_head));
|
||||
}
|
||||
|
||||
/**
|
||||
* pciehp_destroy_board_resources: put node back in the resource list
|
||||
* @resources: list to put nodes back
|
||||
*/
|
||||
void pciehp_destroy_board_resources(struct pci_func * func)
|
||||
{
|
||||
kfree_resource_list(&(func->io_head));
|
||||
kfree_resource_list(&(func->mem_head));
|
||||
kfree_resource_list(&(func->p_mem_head));
|
||||
kfree_resource_list(&(func->bus_head));
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user