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sh: dma-sh updates for multi IRQ and new SH-4A CPUs.

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This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85.

This also enables multi IRQ support for platforms that have multiple
vectors bound to the same IRQ source.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Nobuhiro Iwamatsu
2009-03-10 17:26:49 +09:00
committed by Paul Mundt
parent ae68df5635
commit 71b973a42c
9 changed files with 351 additions and 203 deletions
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17
arch/sh/include/cpu-sh3/cpu/dma.h
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@@ -1,22 +1,17 @@
#ifndef __ASM_CPU_SH3_DMA_H
#define __ASM_CPU_SH3_DMA_H
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721)
#define SH_DMAC_BASE 0xa4010020
#else
#define SH_DMAC_BASE 0xa4000020
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
defined(CONFIG_CPU_SUBTYPE_SH7710) || \
defined(CONFIG_CPU_SUBTYPE_SH7712)
#define SH_DMAC_BASE0 0xa4010020
#else /* SH7705/06/07/09 */
#define SH_DMAC_BASE0 0xa4000020
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709)
#define DMTE0_IRQ 48
#define DMTE1_IRQ 49
#define DMTE2_IRQ 50
#define DMTE3_IRQ 51
#define DMTE4_IRQ 76
#define DMTE5_IRQ 77
#endif
/* Definitions for the SuperH DMAC */
#define TM_BURST 0x00000020